73S1113F
EMV Smart-Card Terminal Controller
with Built-in ISO-7816 Interface and USB
DATA SHEET
DC CHARACTERISTICS: ICC INTERFACE - CLK AND RST SIGNALS
SYMBOL
PARAMETER
Condition
MIN
Typ.
MAX
UNIT
Clock Line CLK2 (VCC = VCC2)
0 < IOH < 50µA,
VOHC
High Level Output Voltage
V
CC - 0.5
VCC
0.4
V
V
V
CC = Min
-50µA < IOL < 0, VCC
=
VOLC
Low Level Output Voltage
Rise / Fall time
0
Min
8% of clock
period
tr-clk, tf-clk
Cload = 30pF max
-
PERTLC
PERTHC
Signal perturbation low
Signal perturbation high
Signal low
Signal high
- 0.25
0.4
V
V
VCC - 0.5
45
VCC + 0.25
Clocks in stable
operation
Duty Cycle
55
%
δ
Reset Line RST2 (VCC = VCC2)
0 < IOH < 50µA, VCC
=
VOHR
High Level Output Voltage
VCC - 0.5
VCC
0.4
0.8
V
V
Min
-50µA < IOL < 0, VCC
Min
=
VOLR
Low Level Output Voltage
Rise / Fall time
0
-
tr-RST
,
Cload = 30pF Max
µs
tf-RST
PERTLR
PERTHR
Signal perturbation low
Signal perturbation high
Signal low
Signal high
- 0.25
0.4
V
V
VCC - 0.5
VCC + 0.25
DC CHARACTERISTICS: ICC INTERFACE – I/O SIGNALS
SYMBOL
PARAMETER
Condition
MIN
Typ.
MAX
UNIT
Data Lines IO2, C42/C82 (VCC = VCC2)
0 < IOH < 20µA,
VCC = Min
VOHSC
VOLSC
tr-SC
High Level Output Voltage
Low Level Output Voltage
Rise / Fall time (Output)
0.8 * VCC
VCC
0.4
0.8
V
V
-1ma < IOL < 0, VCC
Min
=
0
-
,
Cload = 30pF Max
µs
tf-SC
PERTLSC
PERTHSC
Signal perturbation low
Signal perturbation high
Signal low
Signal high
-0.25
0.8 * VCC
0.4
VCC + 0.25
V
V
IOLS
C
Current from I/O when
-500
V
(Inactive)
VILSC
inactive and pin grounded
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Short Circuit Current
Rise / Fall time (Input)
Pull-up to VCC
0.6 * VCC
VCC
0.5
20
20
15
V
V
VILSC
IIHSC
IILSC
ISCSC
IRTFTSC
RPUSC
0
-300
-1000
-15
-
Vin = VIHSC range
Vin = VILSC range
33Ω to opp. supply
µA
µA
mA
µs
kΩ
1.2
17
Static
10
12.5
Page: 11 of 19
© 2005 TERIDIAN Semiconductor Corporation
Rev 2.3
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
