73M2901CE Data Sheet
DS_2901CE_031
7.2 Reference Design Using Traditional Hardware Line Monitoring
11.0592 MHz
C3
VCC3_3D
C2
27pF
VCC3_3D
Y1
33pF
C13
C14
C11
0.1uF
C12
3.3uF
+
+
3.3uF
0.1uF
R17
475
TXD
HYBRID1
U1
R15
73M2901CE
5.1K
C4
56nF
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
VPD
R XD
RXCLK
DTR
USR20
RING
RELAY
RI
VNA
R XA
VBG
VREF
TXAP
TXAN
VPA
R XD
R2
2.7K
R13
21K
DTRB
HYBRID2
VCC3_3D
RIB
VCC3_3A
RESET
C7
C8
C9
C10
R20
27K
+
0.1uF
0.1uF
10uF
0.1uF
DCDB
DSRB
DETECT
LIUCHK
HOOKB
CTSB
RTSB
R18 100
R16 100
VCC3_3D
C1 10uF
R1
10K
C5
3.3uF
C6
+
0.1uF
Figure 4: Modem and Hybrid Circuitry – Traditional Line Monitoring
16
Rev. 3.3
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
