DS_1x22_017
73M1822/73M1922 Data Sheet
7 Clock and Sample Rate Management
The Host-Side Device has an on-chip crystal oscillator, prescaler and PLL/NCO to allow a choice of a wide
range of sample rates and crystal choices. Note the following acronyms are used in this section:
FS
Sampling frequency
NCO Numerically-Controlled Oscillator
7.1 Clock Generation with HIC (73M1902)
The clock generation for the entire chip consists of crystal oscillator, Prescaler NCO, NCO based PLL and a
clock divider as shown in Figure 13.
FrcVco
OSCOUT
OSCIN
4608 Fs= 36.864 MHz
Xtal
Oscillator
Fref
Prescalar
NCO
Sysclk
= 36.864 MHz
or Xtal Freq
PLL
2
XIB(1:0)
PwdnPLL
M/SB
Figure 13: Clock Generation Block Diagram (assumes 8 kHz sample rate)
7.2 Crystal Oscillator
The crystal oscillator is designed to operate with a wide choice of crystals (from 9 MHz to 27 MHz). It is a
common source configuration with current source loading to reduce power consumption. The current
source levels are configurable in 4 steps by using the XIB bits (Register 0x0F[3:2]) for optimum power
performance. On reset the oscillator runs at its full current level. The Host can then step down the current
level by setting the XIB bits to an appropriate value that is adequate to achieve stable oscillation with
minimal EMI generation.
XIB(1:0)
OSCOUT
OSCIN
Figure 14: Crystal Oscillator with Configurable Load Current
Table 5: Crystal Oscillator Load Current versus XIB
XIB
00
01
10
11
Load Current
120 μA
180 μA
270 μA
450 μA
Rev. 1.6
41
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
