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73M1903 参数 Datasheet PDF下载

73M1903图片预览
型号: 73M1903
PDF下载: 下载PDF文件 查看货源
内容描述: 调制解调器模拟前端 [Modem Analog Front End]
分类和应用: 调制解调器
文件页数/大小: 46 页 / 530 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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DS_1903_032  
73M1903 Data Sheet  
8.4 Analog Specifications  
8.4.1 DC Specifications  
VREF should be connected to an external bypass capacitor with a minimum value of 0.1 μF. This pin is  
not intended for any other external use.  
Table 15: Reference Voltage Specifications  
Parameter  
VREF  
Test Condition  
VDD= 3.0 V - 3.6 V.  
300Hz-3.3 kHz  
Min  
Nom  
1.36  
-86  
Max  
Units  
V
VREF Noise  
-80  
dBm600  
dB  
VREF PSRR 300Hz-30 kHz  
40*  
8.4.2 AC Specifications  
Table 16 shows the maximum transmit levels that the output drivers can deliver before distortion through  
the DAA starts to become significant. The loss though the DAA transmit path is assumed to be 7 dB.  
The signals presented at TXAP and TXAN are symmetrical. The transmit levels can be increased by  
setting either TXBST0 (+1.5 dB) or/and TXBST1 (+0.83 dB) for the combined total gain of 2.33 dB.  
These can be used where higher-level DTMF tones are required.  
Table 16: Maximum Transmit Levels  
Transmit Type  
Maximum Different Maximum Single-  
Peak to  
Single-Ended Single-Ended  
Line Level (dBm0)  
Ended Level at  
TXA Pins (dBm)  
rms Ratio rms Voltage at Peak Voltage  
TXA Pins (V) at TXA Pins (v)  
VPA=2.7 V to 3.6 V. All rms and peak voltages are relative to VREF.  
V.90  
-12.0  
-11.0  
-6.3  
-4.1  
-2.0  
-6.8  
-8.8  
4
0.2175  
0.377  
0.481  
0.616  
0.354  
0.283  
0.87  
0.87  
QAM  
-7.3  
-5.1  
-3.0  
-7.8  
-9.8  
2.31  
1.81  
1.41  
1.41  
1.41  
DPSK  
0.87  
FSK  
0.87  
DTMF (high tone)  
DTMF (low tone)  
0.500  
0.400  
Rev. 2.0  
29