73K224BL
V.22bis, V.22, V.21, Bell 212A, 103
Single-Chip Modem w/ Integrated Hybrid
DATA SHEET
CONTROL REGISTER 0 (continued)
CR0 D7 D6 D5
ADDR MODUL. MODUL. MODUL.
D4
D3
D2
D1
D0
TRANSMIT
MODE 2
TRANSMIT
MODE 1
TRANSMIT
MODE 0
TRANSMIT
ENABLE
ANSWER/
ORIGINATE
000
OPTION
TYPE 1
TYPE 0
BIT
D7
NAME
CONDITION
DESCRIPTION
Modulation
Option
0
QAM selects 2400 bit/s. DPSK selects 1200 bit/s.
selects 103 mode.
FSK
1
DPSK selects 600 bit/s.
FSK selects V.21 mode.
CONTROL REGISTER 1
CR1
D7
D6
D5
D4
D3
D2
D1
D0
ADDR TRANSMIT TRANSMIT
ENABLE
DETECT
INTERRUPT
BYPASS
SCRAMBLER
CLOCK
CONTROL
RESET
TEST
MODE 1
TEST
MODE 0
001
PATTERN
1
PATTERN
0
BIT
NAME
CONDITION
DESCRIPTION
D0, D1
Test Mode
D1 D0
0
0
0
1
Selects normal operating mode
Analog loopback mode. Loops the transmitted analog
signal back to the receiver, and causes the receiver to use
the same carrier frequency as the transmitter. To squelch
the TXA pin, transmit enable bit as well as Tone Register
bit D2 must be low.
1
1
0
Selects remote digital loopback. Received data is looped
back to transmit data internally, and RXD is forced to a
mark. Data on TXD is ignored.
1
Selects local digital loopback. Internally loops TXD back to
RXD and continues to transmit data carrier at TXA pin
D2
D3
Reset
0
1
Selects Normal Operations
Resets modem to power-down state. All Control Register
bits (CR0, CR1, CR2, CR3 and tone) are reset to zero
except CR3 bit D2. The output of the clock pin will be set
to the crystal frequency.
Clock Control
0
1
Selects 11.0592 MHz crystal echo output at CLK pin
Selects 16 times the data rate output at CLK pin in
DPSK/QAM modes only.
Page: 11 of 33
© 2005, 2008 TERIDIAN Semiconductor Corporation
Rev 7.1
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
