73K222AL
V.22, V.21, Bell 212A, 103
Single-Chip Modem
DATA SHEET
CONTROL REGISTER 0 (continued)
D7
D6
0
D5
TRANSMIT TRANSMIT
MODE 3 MODE 2
D4
D3
D2
D1
D0
CR0
000
MODUL.
OPTION
TRANSMIT
MODE 1
TRANSMIT
MODE 0
TRANSMIT
ENABLE
ANSWER/
ORIGINATE
BIT NO.
D7
NAME
CONDITION
D7 D5 D4
DESCRIPTION
Selects:
DPSK mode at 1200 bit/s.
DPSK mode at 600 bit/s.
Modulation
Option
0
1
0
0
X
X
0
1
1
1
1
1
FSK Bell 103 mode.
FSK CCITT V.21 mode.
X = Don’t care
CONTROL REGISTER 1
D7
D6
D5
D4
D3
D2
RESET
D1
D0
CR1
001
TRANSMIT
PATTERN
1
TRANSMIT
PATTERN
0
ENABLE
DETECT
INTER.
BYPASS
SCRAMB
CLK
TEST
MODE
1
TEST
MODE
0
CONTROL
BIT NO.
NAME
CONDITION
DESCRIPTION
D1, D0
Test Mode
D1 D0
0
0
0
1
Selects normal operating mode.
Analog loopback mode. Loops the transmitted analog
signal back to the receiver, and causes the receiver to
use the same center frequency as the transmitter. To
squelch the TXA pin, transmit enable must be forced
low.
1
1
0
1
Selects remote digital loopback. Received data is looped
back to transmit data internally, and RXD is forced to a
mark. Data on TXD is ignored.
Selects local digital loopback. Internally loops TXD back
to RXD and continues to transmit carrier from TXA pin.
D2
D3
Reset
0
1
Selects normal operation.
Resets modem to power down state. All control
register bits (CR0, CR1, Tone) are reset to zero. The
output of the CLK pin will be set to the crystal frequency.
Selects 11.0592 MHz crystal echo output at CLK pin.
Selects 16 X the data rate, output at CLK pin in DPSK
modes only.
CLK Control
0
1
(Clock Control)
Page: 10 of 27
© 2007 TERIDIAN Semiconductor Corporation
Rev 6.1
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
