Data Sheet 71M6531D/F-71M6532D/F
FDS 6531/6532 005
5.4
Performance Specifications
5.4.1 Input Logic Levels
Table 70: Input Logic Levels
Parameter
Condition
Min
Typ
Max
Unit
V
Digital high-level input voltagea, VIH
Digital low-level input voltagea, VIL
2
0.8
V
Input pull-up current, IIL
E_RXTX,
VIN=0 V, ICE_E=1
100
100
1
µA
µA
µA
10
10
-1
E_RST, CKTEST
Other digital inputs
0
Input pull down current, IIH
VIN = V3P3D
ICE_E
RESET
PB
10
10
-1
100
100
1
µA
µA
µA
µA
0
0
Other digital inputs
-1
1
a In battery powered modes, digital inputs should be below 0.3 V or above 2.5 V to minimize battery current.
5.4.2 Output Logic Levels
Table 71: Output Logic Levels
Parameter
Condition
ILOAD = 1 mA
ILOAD = 15 mA
ILOAD = 1 mA
ILOAD = 15 mA
ISOURCE=1 mA
ISINK=20 mA
Min
V3P3D–0.4
V3P3D-0.6
0
Typ
Max
Unit
V
Digital high-level output voltage VOH
V
0.4
0.8
0.4
0.7
V
Digital low-level output voltage VOL
V
OPT_TX VOH (V3P3D-OPT_TX)
OPT_TX VOL
V
V
5.4.3 Power-Fault Comparator
Table 72: Power-Fault Comparator Performance Specifications
Parameter
Condition
Min
-20
0.8
Typ
Max
Unit
mV
μA
Offset Voltage: V1-VBIAS
Hysteresis Current: V1
+15
1.2
Vin = VBIAS – 100 mV
+100 mV overdrive
Voltage at V1 rising
Voltage at V1 falling
Response Time: V1
8
37
100
100
-10
µs
μs
10
WDT Disable Threshold: V1-V3P3A
-400
mV
5.4.4 Battery Monitor
Table 73: Battery Monitor Performance Specifications (BME= 1)
Parameter
Condition
Min
Typ
Max
63
(+10%)
Unit
Load Resistor
27
45
kΩ
μV
μV
μV
μV
μV
μV
FIR_LEN[1:0]=0(L=138) (-10%)
FIR_LEN[1:0]=1(L=288)
FIR_LEN[1:0]=2(L=384)
FIR_LEN[1:0]=0(L=186) (-10%)
FIR_LEN[1:0]=1(L=384)
FIR_LEN[1:0]=2(L=588)
-200
-48.7
-5.35
-2.26
-19.8
-2.26
-0.63
0
[M40MHZ, M26MHZ]
= [00], [10], or [11]
LSB Value
Offset Error
(+10%)
+100
[M40MHZ, M26MHZ]
= [01]
mV
100
© 2005-2010 TERIDIAN Semiconductor Corporation
v1.3
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