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71M6533H-IGTR/F 参数 Datasheet PDF下载

71M6533H-IGTR/F图片预览
型号: 71M6533H-IGTR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 电能计量IC [Energy Meter IC]
分类和应用:
文件页数/大小: 124 页 / 1997 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6533/71M6534 Data Sheet  
FDS_6533_6534_004  
2.3.1 BROWNOUT Mode  
In BROWNOUT mode, most non-metering digital functions are active (as shown in Table 45) including  
ICE, UART, EEPROM, LCD and RTC. In BROWNOUT mode, a low-bias current regulator will provide  
2.5 Volts to V2P5 and V2P5NV. The regulator has an output called BAT_OK to indicate that it has suffi-  
cient overhead. When BAT_OK = 0, the part will enter SLEEP mode. From BROWNOUT mode, the pro-  
cessor can voluntarily enter LCD or SLEEP modes. When system power is restored, the part will auto-  
matically transition from any of the battery modes to MISSION mode, once the PLL has settled.  
Table 45: Available Circuit Functions  
System Power  
Battery Power (Nonvolatile Supply)  
Circuit Function  
MISSION  
Yes  
BROWNOUT  
LCD  
SLEEP  
CE  
CE/MPU Data RAM  
FIR  
Yes  
Yes  
Yes  
Analog circuits:  
MPU clock rate  
Yes  
28.672 kHz  
(7/8 of 32768 Hz)  
From PLL, as de-  
fined by MPU_DIV  
MPU_DIV  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
ICE  
Yes  
Yes  
DIO Pins  
Watchdog Timer  
LCD  
Yes  
Yes  
Yes  
EEPROM Interface (2-wire)  
EEPROM Interface (3-wire)  
UART  
Yes (8 kb/s)  
Yes (16 kb/s)  
300 bd  
Optical TX modulation  
Flash Read  
Yes  
Flash Page Erase  
Flash Write  
Yes  
XRAM Read and Write  
Wakeup Timer  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Oscillator and RTC  
XRAM data preservation  
V3P3D voltage output pin  
GPO – GP7 registers  
– indicates not active  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
The MPU will run at 7/8 of the crystal clock rate in BROWNOUT mode. This permits the UARTs to be  
operated at 300 bd. In this mode, the MPU clock has substantial short-term jitter.  
The value of MPU_DIV will be remembered (not changed) as the part enters and exits BROWNOUT.  
MPU_DIV will be ignored during BROWNOUT.  
While PLL_OK = 0, the I/O RAM bits ADC_E and CE_E are held in the zero state disabling both the ADC  
and the CE. When PLL_OK falls, the CE program counter is cleared immediately and all FIR processing  
halts.  
Figure 21 shows the functional blocks active in BROWNOUT mode.  
56  
© 2007-2009 TERIDIAN Semiconductor Corporation  
v1.1