FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
5.4.15 ADC Converter, V3P3A Referenced
Table 78 shows the performance specifications for the ADC converter, V3P3A referenced. For this data,
FIR_LEN=0, VREF_DIS=0 and LSB values do not include the 8-bit left shift at the CE input.
Table 78: ADC Converter Performance Specifications
Parameter
Condition
Min
Typ
Max
Unit
Recommended Input Range
(Vin-V3P3A)
-250
250
mV
peak
Voltage to Current Crosstalk
Vin = 200 mV peak,
65 Hz, on VA.
Vcrosstalk = largest
measurement on IA or IB
-10
10
μV/V
106 *Vcrosstalk
cos(∠Vin − ∠Vcrosstalk)
Vin
THD (First 10 harmonics) 1:
250 mV-pk
Vin=65 Hz,
64 kpts FFT, Blackman-
Harris window
-75
-90
dB
dB
20 mV-pk
CKCE = 5 MHz
Input Impedance
Vin = 65 Hz
Vin = 65 Hz
40
90
kΩ
Temperature coefficient of Input Im-
pedance
1.7
Ω/°C
nV/
LSB
LSB size
[M40MHZ,
M26MHZ] =
[00], [10], or [11]
FIR_LEN=0
FIR_LEN=1
FIR_LEN=2
3231
355
150
3
1.25
4.75
3
VLSB = VREF
⋅
⋅
L
L = FIR length
[M40MHZ,
M26MHZ] =
[01]
nV/
LSB
FIR_LEN=0
FIR_LEN=1
FIR_LEN=2
1319
150
42
[M40MHZ,
M26MHZ] =
[00], [10], or [11]
LSB
LSB
Digital Full Scale
FIR_LEN=0
FIR_LEN=1
FIR_LEN=2
±97336
±884736
±2097152
3
L
3
[M40MHZ,
M26MHZ] =
FIR_LEN=0
FIR_LEN=1
FIR_LEN=2
±238328
±2097152
±7529536
L = FIR length
[01]
50
10
ppm/%
mV
ADC Gain Error versus
%Power Supply Variation
Vin=200 mV pk, 65 Hz
V3P3A=3.0 V, 3.6 V
106 ∆NoutPK 357nV /VIN
100∆V3P3A/3.3
Input Offset (Vin-V3P3A)
-10
v1.2
© 2005-2009 TERIDIAN Semiconductor Corporation
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