Data Sheet 71M6531D/F-71M6532D/F
FDS 6531/6532 005
5.9
Pin Descriptions
5.9.1 Power and Ground Pins
Table 84: Power and Ground Pins
Name
Type Circuit
Description
–
GNDA
P
Analog ground: This pin should be connected directly to the ground
plane.
–
–
GNDD
V3P3A
P
P
Digital ground: This pin should be connected directly to the ground plane.
Analog power supply: A 3.3 V power supply should be connected to this
pin, must be the same voltage as V3P3SYS.
–
V3P3SYS
V3P3D
P
System 3.3 V supply. This pin should be connected to a 3.3 V power
supply.
O
13
Auxiliary voltage output of the chip, controlled by the internal 3.3 V selec-
tion switch. In mission mode, this pin is internally connected to
V3P3SYS. In BROWNOUT mode, it is internally connected to VBAT.
This pin is floating in LCD and sleep mode. A bypass capacitor to ground
should not exceed 0.1 µF.
VBAT
V2P5
P
12
10
Battery backup and oscillator power supply. A battery or super-capacitor
is to be connected between VBAT and GNDD. If no battery is used, con-
nect VBAT to V3P3SYS.
O
Output of the internal 2.5 V regulator. A 0.1 µF capacitor to GNDA
should be connected to this pin.
5.9.2 Analog Pins
Table 85: Analog Pins
Description
Name
IA, IB
Type Circuit
I
I
I
6
6
7
Line Current Sense Inputs: These pins are voltage inputs to the internal
A/D converter. Typically, they are connected to the outputs of current sen-
sors. Unused pins must be tied to V3P3A.
IAP/IAN,
IBP/IBN
1)
VA, VB,
VX 1)
Line Voltage Sense Inputs: These pins are voltage inputs to the internal
A/D converter. Typically, they are connected to the outputs of resistor di-
viders. Unused pins must be tied to V3P3A.
The VX pin is not supported by standard CE code.
V1
Comparator Input: This pin is a voltage input to the internal comparator.
The voltage applied to the pin is compared to the internal BIAS voltage
(1.6 V). If the input voltage is above VBIAS, the comparator output will be
high (1). If the comparator output is low, a voltage fault will occur. A se-
ries resistor should be connected from V1 to the resistor divider to provide
hysteresis.
VREF
O
I
9
8
Voltage Reference for the ADC. Normally disabled and left unconnected.
If enabled, a 0.1 µF capacitor to V3P3A should be connected to this pin.
XIN
XOUT
Crystal Inputs: A 32 kHz crystal should be connected across these pins.
Typically, a 33 pF capacitor is also connected from XIN to GNDA and a
15 pF capacitor is connected from XOUT to GNDA. It is important to mi-
nimize the capacitance between these pins. See the crystal manufacturer
datasheet for details.
If an external clock is used, a 150 mV (p-p) clock signal should be applied
to XIN, and XOUT should be left unconnected.
1) Differential pin pairs IAP/IAN and IBP/IBN, as well as single-ended VX pin used on 71M6532D/F only.
Pin types: P = Power, O = Output, I = Input, I/O = Input/Output
The circuit number denotes the equivalent circuit, as specified under Section 5.9.4 I/O Equivalent Circuits.
110
© 2005-2009 TERIDIAN Semiconductor Corporation
v1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
