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71M6521DE-IGTR/F 参数 Datasheet PDF下载

71M6521DE-IGTR/F图片预览
型号: 71M6521DE-IGTR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 电能计量IC [Energy Meter IC]
分类和应用:
文件页数/大小: 101 页 / 1677 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6521DE/71M6521FE  
Energy Meter IC  
DATASHEET  
JANUARY 2008  
MSB  
SM  
LSB  
-
SM21  
REN1  
TB81  
RB81  
TI1  
RI1  
Table 16: The S1CON register  
Bit  
Symbol  
Function  
S0CON.7  
SM0  
These two bits set the UART0 mode:  
Mode  
0
Description  
N/A  
SM0  
SM1  
0
0
1
0
1
1
2
3
8-bit UART  
9-bit UART  
9-bit UART  
0
1
1
S0CON.6  
SM1  
S0CON.5  
S0CON.4  
S0CON.3  
SM20  
REN0  
TB80  
Enables the inter-processor communication feature.  
If set, enables serial reception. Cleared by software to disable reception.  
The 9th transmitted data bit in Modes 2 and 3. Set or cleared by the MPU, depending  
on the function it performs (parity check, multiprocessor communication etc.)  
S0CON.2  
S0CON.1  
S0CON.0  
RB80  
TI0  
In modes 2 and 3 it is the 9th data bit received. In Mode 1, if SM20 is 0, RB80 is the  
stop bit. In mode 0 this bit is not used. Must be cleared by software  
Transmit interrupt flag, set by hardware after completion of a serial transfer. Must be  
cleared by software.  
RI0  
Receive interrupt flag, set by hardware after completion of a serial reception. Must  
be cleared by software  
Table 17: The S0CON Bit Functions  
Bit  
Symbol  
Function  
S1CON.7  
SM  
Sets the baud rate for UART1  
SM  
Mode  
Description  
Baud Rate  
0
1
A
B
9-bit UART  
8-bit UART  
variable  
variable  
S1CON.5  
S1CON.4  
S1CON.3  
SM21  
REN1  
TB81  
Enables the inter-processor communication feature.  
If set, enables serial reception. Cleared by software to disable reception.  
The 9th transmitted data bit in Mode A. Set or cleared by the MPU, depending on the  
function it performs (parity check, multiprocessor communication etc.)  
S1CON.2  
S1CON.1  
S1CON.0  
RB81  
TI1  
In Modes A and B, it is the 9th data bit received. In Mode B, if SM21 is 0, RB81 is the  
stop bit. Must be cleared by software  
Transmit interrupt flag, set by hardware after completion of a serial transfer. Must be  
cleared by software.  
RI1  
Receive interrupt flag, set by hardware after completion of a serial reception. Must  
be cleared by software  
Table 18: The S1CON Bit Functions  
Page: 24 of 101  
© 2005-2008 TERIDIAN Semiconductor Corporation  
v1.0  
 
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