71M6521BE
Energy Meter IC
DATA SHEET
JANUARY 2008
VREF
V3P3A
GNDA
V3P3SYS
ΔΣ
ADC
CONVERTER
IA
VA
IB
VB
MUX
VBIAS
VBIAS
V3P3A
-
+
ADC_E
FIR
V3P3D
VREF
TEMP
MUX
MUX
CTRL
EQU
MUX_ALT
CHOP_E
MUX_DIV
VREF_CAL
VREF_DIS
CROSS
CK32
VREF
FIR_LEN
VBAT
VOLT
REG
X4MHZ
XIN
XOUT
CKTEST/
SEG19
CKOUT_E
CK_GEN
ECK_DIS
MPU_DIV
MUX_SYNC
CKCE
<4.9MHz
STRT
CE
32 bit Compute
Engine
WPULSE
VARPULSE
RTM
DATA
00-7F
MUX
LCD DISPLAY
DRIVER
MEMORY SHARE
LCD_NUM
LCD_MODE
LCD_CLK
LCD_E
LCD_BLKMAP
LCD_SEG
LCD_Y
DIGITAL I/O
DIO_EEX
DIO_PV/PW
DIO_DIR
DIO_R
LCD_NUM
DIO
CK_2X
CE RAM
(0.5KB)
OSC
(32KHz)
32KHz
MCK
PLL
CK32
32KHz
DIV
ADC
LCD_ONLY
SLEEP
CKFIR
4.9MHz
V3P3D
LCD_GEN
VLC2
VLC1
LCD_MODE
LCD_E
VLC0
2.5V to logic
GNDD
V2P5
CKOUT_E
4.9MHz
CKADC
4.9MHz
TEST
TEST
MODE
COM0..3
SEG0..18
SEG32,33
SEG19,38
CE
CONTROL
RTM_0..3
RTM_E
CE_E
XFER BUSY
CE_BUSY
PROG
000-1FF
1000-11FF
SEG24/DIO4 ..
SEG31/DIO11
SEG34/DIO14 ..
SEG37/DIO17
PLS_INV
PLS_INTERVAL
PLS_MAXWIDTH
CE_LCTN
EQU
PRE_SAMPS
SUM_CYCLES
CKMPU
<4.9MHz
WPULSE
VARPULSE
EEPROM
INTERFACE
I/O RAM
DIO1,2
PB
SDCK
RX
UART
SDOUT
SDIN
MPU
(80515)
OPTICAL
OPT_RXDIS
OPT_RXINV
OPT_TXE
OPT_TXINV
OPT_TXMOD
OPT_FDC
0000-
1FFF
DATA
0000-FFFF
0000-07FF
MPU XRAM
(2KB)
2000-20FF
CONFIG
(I/O RAM)
CONFIGURATION
PARAMETERS
TX
OPT_RX/
DIO1
OPT_TX/
DIO2/
WPULSE/
VARPULSE
VBIAS
PROG
0000-1FFF
MEMORY
SHARE
CE_LCTN
FLASH
8KB
FLSH66ZT
POWER FAULT
MPU_RSTZ
WAKE
FAULTZ
V1
COMP_STAT
EMULATOR
PORT
E_RXTX
E_TCLK
E_RST (Open Drain)
TEST
MUX
TMUX[4:0]
February 2, 2007
TMUXOUT
RESET
E_RXTX/SEG38
E_TCLK/SEG33
E_RST/SEG32
ICE_E
Figure 1: IC Functional Block Diagram
Page: 8 of 97
© 2005-2008 TERIDIAN Semiconductor Corporation
V1.0
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
