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71M6515H-IGTR/F 参数 Datasheet PDF下载

71M6515H-IGTR/F图片预览
型号: 71M6515H-IGTR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 电能计量IC [Energy Meter IC]
分类和应用:
文件页数/大小: 57 页 / 685 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6515H  
Energy Meter IC  
DATA SHEET  
MARCH 2008  
The pulse generator output rate depends on its input value, WRATE, PULSE_SLOW, and PULSE_FAST. Additionally, its  
maximum pulse width (negative going pulse) is controlled by PULSEWIDTH. High frequency pulses will have 50% duty cycle  
until their rate slows enough that their pulse width is limited by PULSEWIDTH.  
In internal and post-processed modes, the pulse rate, expressed as Kh (Wh per pulse) is given by the formula:  
VMAX IMAX  
Kh =  
1.5757 Wh / Pulse  
In _ 8 SUM _ CYCLES WRATE X  
where  
VMAX is the meter voltage corresponding to an input voltage of 176mV (rms) at the VA, VB, and VC input pins ,  
IMAX is the meter current corresponding to an input voltage of 176mV (rms) at the IA, IB, and IC input pins,  
In_8 is the additional ADC gain (1 or 8), as controlled by the IA_X, IB_X and IC_X bits in the CONFIG register.  
X is the pulse speed factor determined from Table 3.  
PULSE_SLOW  
PULSE_FAST  
X
0
0
1
0
1
0
1.5*22=6  
1.5*26=96  
1.5*2-4=0.09375  
1.5  
1 (default)  
1 (default)  
Table 3: Pulse Speed Factor X  
In external pulse mode, the pulse rate is given by the formula:  
Rate(Hz) = WRATE * X * input * 35.82*10-12  
,
where input is the value in registers APULSER, APULSEW. APULSE3 or APULSE4,  
X is the pulse speed factor determined from Table 3.  
External pulse generation can be seen as providing the raw voltage and current readings equivalent to Vin*Iin / LSB directly to  
the pulse generator.  
The maximum pulse rate is 7.56kHz for PULSEW and PULSER, and 150Hz for PULSE3 and PULSE4.  
In external pulse mode, the pulse generators load their data at the beginning of each CE accumulation interval, preserving any  
partially implemented pulses from the previous interval. The source of data is controlled by the entries in the PULSE_SRCS  
register. PULSER_SRCS contains 8-bit entries for each pulse source, PULSEW, PULSER, PULSE3, and PULSE4. See the  
register description for details.  
The procedure for accurate external pulse generation controlled by the host is:  
1) Respond to a READY interrupt by reading the accumulated values.  
2) Process the accumulated values.  
3) Write the processed value(s) to APULSER, APULSEW, APULSE3, or APULSE4. The host must write to APULSER,  
APULSEW, APULSE3, and APULSE4 before the next READY interrupt for the pulse generation to be beginning in the  
following accumulation interval.  
Figure 9 illustrates pulse generator timing.  
Regardless of the source, the pulse generators should receive new data during each accumulation interval. If this does not  
occur and if the corresponding bit in the STMASK register is set, an APULSE_ERR interrupt will be issued.  
The PULSEW, PULSER, PULSE3 and PULSE4 pins are suitable for driving LEDs through a current limiting resistor. The LED  
should be connected so it is on when the pulse pin is low.  
The pin PULSE_INIT determines the logic level applied to the pulse pins on power-up, i.e. with PULSE_INIT low, the pulse  
pins will be initialized to low (default = 1).  
Page: 16 of 57  
© 2005-2008 TERIDIAN Semiconductor Corporation  
V1.4  
 
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