71M6513/71M6513H
3-Phase Energy Meter IC
A Maxim Integrated Products Brand
DATA SHEET
SEPTEMBER 2011
ORDERING INFORMATION
ORDERING
NUMBER
PACKAGE
MARKING
PART DESCRIPTION
71M6513
71M6513-IGT/F
71M6513-IGT
71M6513-IGT
71M6513H-IGT
71M6513H-IGT
100-pin lead-free LQFP, 0.5% accuracy
71M6513
71M6513-IGTR/F
71M6513H-IGT/F
71M6513H-IGTR/F
100-pin lead-free LQFP, 0.5% accuracy, T&R
71M6513H
100-pin lead-free LQFP, 0.1% accuracy
71M6513H
100-pin lead-free LQFP, 0.1% accuracy, T&R
Revision History
Revision
Date
Description
2.0
2.1
11/23/2005
11/30/2005
Initial release
Updated Electrical Specification (TC1/TC2, fuse descriptions)
Improved MPU register (SFR) description. Added information in Electrical
Specifications (ADC resolution 355nV/LSB with FIR_LEN=0, formula for
temperature coefficients, 38 kHz MPU clock, VREF aging information, current
consumption in low-power mode, removed note on ADC count [3.589,461 * 600 *
7.8E-9 = 169V]). Improved CE description (added X to pulse rate formula,
TEMP_NOM default value, APULSER and APULSEW update by MPU, relation
between ADC cycles and MUX_DIV. Added notes and clarifications on flash
write operations. Added information in Applications section on connection of V3,
crystal frequency variations and frequency measurement. Improved figures 4 and
5. Added caution notes for timing required for SW WDT and for conditions
blocking interrupt processing. Added note in pin descriptions on connection of V3.
2.2
4/17/2006
Added I/O Equivalent Circuits and interrupt structure diagram. Added note in CE
Section stating that CE STATUS word must be read right after the CE_BUSY
interrupt. Deleted FLSH_TMR from list of pins in Logic Levels. Updated Table 51
(DIO pins) and Figure 11. Changed capacitor value for XIN/XOUT in Pin
Descriptions and in Recommended External Components. Added items in
Electrical Specification (temperature range for maximum write cycles, flash
retention time for +85°C, maximum number of writes in between flash erase
operations). Added note in Pin Descriptions on external reset circuitry. Added
cautionary notes for ECK_DIS and SECURE bits. Added requirements for termination
in pin tables for DIO_0-DIO_3, DIO/SEG, RX, OPT_RX pins. Added explanation
of SRDY polarity.
2.3
3/14/2007
© 2005-2011 Teridian Semiconductor Corporation
Page: 103 of 104
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
