71M6403
Electronic Trip Unit
SEPTEMBER 2006
Interrupt Priority 0 Register (IP0):
MSB
LSB
--
WDTS
IP0.5
IP0.4
IP0.3
IP0.2
IP0.1
IP0.0
Table 29: The IP0 Register
Bit
Symbol
Function
IP0.6
WDTS
Watchdog timer status flag. Set when the watchdog timer was started. Can be
read by software.
Table 30: The IP0 bit Functions
Note: The remaining bits in the IP0 register are not used for watchdog control
Watchdog Timer Reload Register (WDTREL):
MSB
LSB
7
6
5
4
3
2
1
0
Table 31: The WDTREL Register
Bit
Symbol
Function
Prescaler select bit. When set, the watchdog is clocked through an additional
divide-by-16 prescaler
WDTREL.7
7
WDTREL.6
to
Seven bit reload value for the high-byte of the watchdog timer. This value is
loaded to the WDT when a refresh is triggered by a consecutive setting of bits
WDT and SWDT.
6-0
WDTREL.0
Table 32: The WDTREL Bit Functions
The WDTREL register can be loaded and read at any time.
Page: 28 of 75
© 2006 TERIDIAN Semiconductor Corporation
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