71M6403
Electronic Trip Unit
SEPTEMBER 2006
Internal Data Memory: The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory. The internal data memory
address is always 1 byte wide and can be accessed by either direct or indirect addressing. The Special Function Registers
occupy the upper 128 bytes. This SFR area is available only by direct addressing. Indirect addressing accesses the upper
128 bytes of Internal RAM.
The lower 128 bytes contain working registers and bit-addressable memory. The lower 32 bytes form four banks of eight
registers (R0-R7). Two bits on the program memory status word (PSW) select which bank is in use. The next 16 bytes form a
block of bit-addressable memory space at bit addressees 0x00-0x7F. All of the bytes in the lower 128 bytes are accessible
through direct or indirect addressing. Table 4 shows the internal data memory map.
Address
Direct addressing
Indirect addressing
0xFF
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
Special Function Registers
(SFRs)
RAM
Byte-addressable area
Bit-addressable area
Register banks R0…R7
Table 4: Internal Data Memory Map
Special Function Registers (SFRs)
A map of the Special Function Registers is shown in Table 5.
Hex\Bin
X000
X001
X010
X011
X100
X101
X110
X111
Bin/Hex
F8
F0
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
98
90
88
80
INTBITS
FF
F7
EF
E7
DF
D7
CF
C7
BF
B7
AF
A7
9F
97
B
WDI
A
WDCON
PSW
IRCON
IEN1
IP1
S0RELH
FLSHCTL
S0RELL
DIR0
S1RELH
S1CON
USR2
PGADR
IEN0
P2
IP0
DIR2
S0BUF
DIR1
TMOD
SP
S0CON
P1
IEN2
S1BUF S1RELL EEDATA EECTRL
DPS
ERASE
TCON
P0
TL0
TL1
DPH
TH0
TH1
DPH1
CKCON
WDTREL
8F
87
DPL
DPL1
PCON
Table 5: Special Function Registers Locations
Only a few addresses are occupied, the others are not implemented. SFRs specific to the 71M6403 are shown in bold print. Any
read access to unimplemented addresses will return undefined data, while any write access will have no effect.
Page: 16 of 75
© 2006 TERIDIAN Semiconductor Corporation
REV 1.0
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
