71M6403
Electronic Trip Unit
SEPTEMBER 2006
Timer/Counter Control register (TCON)
MSB
LSB
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Table 39: The TCON Register
Bit
TCON.7
Symbol
Function
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Timer 1 overflow flag
Not used for interrupt control
Timer 0 overflow flag
Not used for interrupt control
External interrupt 1 flag
External interrupt 1 type control bit
External interrupt 0 flag
TCON.6
TCON.5
TCON.4
TCON.3
TCON.2
TCON.1
TCON.0
External interrupt 0 type control bit
Table 40: The TCON Bit Functions
Interrupt Request register (IRCON)
MSB
LSB
EX6
IEX5
IEX4
IEX3
IEX2
Table 41: The IRCON Register
Bit
IRCON.7
Symbol
Function
-
IRCON.6
IRCON.5
IRCON.4
IRCON.3
IRCON.2
IRCON.1
IRCON.0
-
IEX6
IEX5
IEX4
IEX3
IEX2
-
External interrupt 6 edge flag
External interrupt 5 edge flag
External interrupt 4 edge flag
External interrupt 3 edge flag
External interrupt 2 edge flag
Table 42: The IRCON Bit Functions
Note: Only TF0 and TF1 (timer 0 and timer 1 overflow flag) will be automatically cleared by hardware when the service routine is
called (Signals T0ACK and T1ACK – port ISR – active high when the service routine is called).
Page: 31 of 75
© 2006 TERIDIAN Semiconductor Corporation
REV 1.0
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