U842B
Wipe/ Wash Operation
CL
3
0
1
2
ON
OUT
OFF
SC
IC>500mA
t
7
13301
Figure 4. The debouncing of the short circuit detection
The relay output is protected against short interference
peaks by an integrated 28-V Z-diode. During load-dump,
the relay output is switched to conductive condition if the
battery voltage exceeds approximately 30 V. The output
transistor is dimensioned so that it can absorb the current
produced by the load-dump pulse.
Relay Output
The relay output is an open collector Darlington transistor
with an integrated 28-V Z-diode for limitation of the
inductive cut-out pulse of the relay coil. The maximum
static collector current must not exceed 300 mA and the
saturation voltage is typically 1.2 V for a current of
200 mA.
Power-on Reset
The collector current is permanently measured by an inte-
grated shunt, and in the case of a short circuit
When the operating voltage is switched on, an internal
power-on reset pulse (POR) is generated which sets the
logic of the circuits to defined initial condition. The relay
output is disabled, the short circuit buffer is reset.
(I > 500 mA) to V , the relay output is stored disabled.
C
bat
The short circuit buffer is reset by opening the INT and
WASH switches. As long as the short condition exists a
further activation of these switches will disable the output
stage again. Otherwise the normal wipe operation is per-
formed.
Functional Description
Interval Function
In order to avoid short-term disabling caused by current
The circuit is brought to its interval mode with the input
switch INT operated for more than 625 ms
pulses of transients, a 10 ms debounce period (t ) is pro-
7
vided (see figure 4).
(t > t + t +t ).
4
4D
5
During a load-dump pulse, the output transistor is
switched to conductive condition to prevent destruction.
The short circuit detection is suppressed during the load-
dump.
This time includes:
– 100 ms debounce time t
– 25 ms INT switch-on delay t
– 500 ms relay activation time t
4
4D
5
Interference Voltages and Load-dump
If the INT input is toggled for 125 ms < t < 625 ms, the
relay activation time t lapses anyway and the wiper
performs one turn. To enable correct interval functioning,
the INT input has to be activated afterwards as described.
5
The IC supply is protected by R , C and an integrated
21-V Z-diode. The inputs are protected by a series
resistor, integrated 21-V Z-diode and RF capacitor.
1
1
The RC-configuration stabilizes the supply of the circuit The beginning of the interval pause depends on the
during negative interference voltages to avoid power-on application with or without wiper motor park switch (see
reset (POR).
figures 5, 6, 7 and 8).
4 (12)
TELEFUNKEN Semiconductors
Rev. A2, 03-Feb-97
TEMIC [ TEMIC SEMICONDUCTORS ]
