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U6084B-FP 参数 Datasheet PDF下载

U6084B-FP图片预览
型号: U6084B-FP
PDF下载: 下载PDF文件 查看货源
内容描述: PWM功率控制,具有自动占空比降低 [PWM Power Control with Automatic Duty Cycle Reduction]
分类和应用: 开关功率控制光电二极管
文件页数/大小: 8 页 / 142 K
品牌: TEMIC [ TEMIC SEMICONDUCTORS ]
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U6084B  
Pin Description  
Pin  
1
Symbol  
GND  
Function  
GND  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
S
IC ground  
2
En / Dis Enable/disable  
Control input (duty cycle)  
Reduct Duty cycle reduction  
En / Dis  
NC  
3
V
I
4
V
I
Output  
5
NC  
Osc  
Attenuation  
6
Oscillator  
7
NC  
Not connected  
Not connected  
Status short circuit latch  
Not connected  
Short circuit protection delay  
Current sensing  
Voltage doubler  
Output  
Reduct  
2 V  
S
8
NC  
9
Latch  
NC  
Attenuation  
Osc  
Sense  
Delay  
10  
11  
12  
13  
14  
15  
16  
Delay  
Sense  
2V  
NC  
S
NC  
NC  
Output  
NC  
Not connected  
Latch  
V
S
Supply voltage V  
S
95 9754  
Pin 4, Duty Cycle Reduction  
Functional Description  
With Pin 4 connected according to figure 2, the set duty  
cycle is reduced as from V 12.5 V. This causes a  
power reduction in the FET and in the lamps. In addition,  
the brightness of the lamps is largely independent of the  
Pin1, GND  
Batt  
Ground-Wire Breakage  
supply voltage range, V  
= 12.5 to 16 V.  
Batt  
To protect the FET in the case of ground-wire breakage,  
a 820 k resistor between gate and source it is recom-  
mended to provide proper switch-off conditions.  
Output Slope Control  
The rise and fall time (t , t ) of the lamp voltage can be  
r
f
limited to reduce radio interference. This is done with an  
integrator which controls a power MOSFET as source fol-  
lower. The slope time is controlled by an external  
capacitor C4 and the oscillator current (see figure 2).  
Pin 2, Enable/Disable  
The dimmer can be switched on or off with pin 2 indepen-  
dently of the set duty cycle.  
Calculation:  
C4  
tf  
tr  
VBatt  
V
Function  
Disable  
Iosc  
2
Approx. >0.7 V or open  
With V  
Batt  
= 12 V, C = 470 pF and I = 40 A,we thus  
4
osc  
obtain a controlled slope of  
< 0.7 V or connected to Pin 1 Enable  
470 pF  
tf  
tr  
12 V  
141 s  
Pin 3, Control Input  
40  
A
Pin 5, Attenuation  
The pulse width is controlled by means of an external po-  
tentiometer (47 k ). The characteristic (angle of  
rotation/duty cycle) is linear. The duty cycle can be varied  
from 0 to 100%. It is possible to further restrict the duty  
Capacitor C connected to Pin 5 damps oscillation  
4
tendencies.  
Pin 6, Oscillator  
cycle with the resistors R and R (see figure 2).  
1
2
Pin 3 is protected against short-circuit to V  
and ground  
The oscillator determines the frequency of the output  
Batt  
GND (V  
16.5 V).  
voltage. This is defined by an external capacitor, C . It is  
Batt  
2
2 (8)  
TELEFUNKEN Semiconductors  
Rev. A1, 14-Feb-97