TSC87C52
EPROM
EPROM Structure
The TSC87C52 EPROM is divided in two different arrays:
D
D
the code array:
8 Kbytes.
64 bytes.
the encryption array:
In addition a third non programmable array is implemented:
D
the signature array:
4 bytes.
EPROM Lock System
The program Lock system, when programmed, protects the on–chip program against software piracy.
Encryption Array
Within the EPROM array are 64 bytes of encryption array that are initially unprogrammed (all 1’s). Every time a byte
is addressed during program verify, 6 address lines are used to select a byte of the encryption array. This byte is then
exclusive–NOR’ed (XNOR) with the code byte, creating an encryption verify byte. The algorithm, with the encryption
array in the unprogrammed state, will return the code in its original, unmodified form.
When using the encryption array, one important factor needs to be considered. If a byte has the value FFh, verifying
the byte will produce the encryption byte value. If a large block (>64 bytes) of code left unprogrammed, a verification
routine will display the content of the encryption array. For this reason all the unused code bytes should be programmed
with random values. This will ensure program protection.
EPROM Programming
Set–up modes
In order to program and verify the EPROM or to read the signature bytes, the TSC87C52 is placed in specific set–up
modes (see Figure 8).
Control and program signals must be held at the levels indicated in Table 6.
Definition of terms
Address Lines:
Data Lines:
P1.0–P1.7, P2.0–P2.4 respectively for A0–A12
P0.0–P0.7 for D0–D7
Control Signals: RST, PSEN, P2.6, P2.7, P3.3, P3.6, P3.7.
Program Signals: ALE/PROG, EA/VPP.
Table 6 EPROM Set–up Modes
ALE/
PROG
Mode
RST
PSEN
EA/VPP
P2.6
P2.7
P3.3
P3.6
P3.7
Program Code data
Verify Code data
1
1
0
0
12.75V
1
0
0
1
1
0
1
1
1
1
1
Program Encryption Array
Address 0–3Fh
1
1
0
0
12.75V
1
0
0
1
1
0
0
0
1
0
Read Signature Bytes
1
MATRA MHS
Rev. C – 10 Sept 1997
11
Preliminary
TEMIC [ TEMIC SEMICONDUCTORS ]
