TSC87C52
External Clock Drive Characteristics (XTAL1)
Symbol
TCLCL
TCHCX
TCLCX
TCLCH
TCHCL
Parameter
Min
30
5
Max
Units
ns
Oscillator Period
High Time
Low Time
Rise Time
Fall Time
ns
5
ns
5
5
ns
ns
External Clock Drive Waveforms
VCC–0.5V
0.7VCC
0.2VCC–0.1
0.45V
TCHCX
TCLCH
TCLCX
TCHCL
TCLCL
AC Testing Input/Output Waveforms
VCC –0.5 V
0.2 VCC + 0.9
0.2 VCC – 0.1
INPUT/OUTPUT
0.45 V
AC inputs during testing are driven at VCC – 0.5 for a logic “1” and 0.45V for a logic “0”. Timing measurement are
made at VIH min for a logic “1” and VIL max for a logic “0”.
Float Waveforms
FLOAT
VOH – 0.1 V
VOL + 0.1 V
VLOAD + 0.1 V
VLOAD – 0.1 V
VLOAD
For timing purposes as port pin is no longer floating when a 100 mV change from load voltage occurs and begins to
float when a 100 mV change from the loaded VOH/VOL level occurs. IOL/IOH ≥ ± 20mA.
MATRA MHS
Rev. C – 10 Sept 1997
22
Preliminary
TEMIC [ TEMIC SEMICONDUCTORS ]
