DG300A/301A/302A/303A
Functional Block Diagram and Pin Configuration (Cont’d)
DG301A
Dual-In-Line
DG301A
Metal Can
V+ (Substrate and Case)
1
2
3
4
5
6
7
14
13
12
11
10
9
NC
V+
D
D
1
D
D
2
Truth Table
SW1
1
2
10
1
4
9
6
Logic
SW2
ON
NC
NC
S
S
1
2
0
1
OFF
2
3
8
S
1
S
2
ON
OFF
NC
IN
NC
NC
V–
7
Logic “0” v 0.8 V
Logic “1” w 4 V
NC
IN
5
NC
V–
8
GND
GND
Top View
Top View
DG302A
Dual-In-Line
1
14
NC
V+
Truth Table
2
3
4
5
6
7
13
12
11
10
9
S
D
S
4
3
3
1
1
1
Logic
Switch
0
1
OFF
ON
D
D
4
2
D
Logic “0” v 0.8 V
Logic “1” w 4 V
S
S
2
IN
IN
2
8
GND
V–
Top View
DG303A
Dual-In-Line
1
2
3
4
5
6
7
14
13
12
11
10
9
NC
V+
Truth Table
SW1, SW2 SW3, SW4
S
D
S
4
3
3
1
1
1
Logic
0
1
OFF
ON
ON
D
D
4
2
OFF
D
Logic “0” v 0.8 V
Logic “1” w 4 V
S
S
2
IN
IN
2
8
GND
V–
Top View
2
Siliconix
S-52880—Rev. C, 28-Apr-97
TEMIC [ TEMIC SEMICONDUCTORS ]
