欢迎访问ic37.com |
会员登录 免费注册
发布采购

AF180C154-36 参数 Datasheet PDF下载

AF180C154-36图片预览
型号: AF180C154-36
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS 0至36 MHz的单芯片8位微控制器 [CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 24 页 / 242 K
品牌: TEMIC [ TEMIC SEMICONDUCTORS ]
 浏览型号AF180C154-36的Datasheet PDF文件第1页浏览型号AF180C154-36的Datasheet PDF文件第2页浏览型号AF180C154-36的Datasheet PDF文件第3页浏览型号AF180C154-36的Datasheet PDF文件第5页浏览型号AF180C154-36的Datasheet PDF文件第6页浏览型号AF180C154-36的Datasheet PDF文件第7页浏览型号AF180C154-36的Datasheet PDF文件第8页浏览型号AF180C154-36的Datasheet PDF文件第9页  
80C154/83C154  
Pin Description  
Vss  
Port 2  
Port 2 is an 8 bit bi-directional I/O port with internal  
pullups. Port 2 pins that have 1’s written to them are  
pulled high by the internal pullups, and in that state can  
be used as inputs. As inputs, Port 2 pins that are externally  
being pulled low will source current (ILL, on the data  
sheet) because of the internal pullups. Port 2 emits the  
high-order address byte during fetches from external  
Program Memory and during accesses to external Data  
Memory that use 16 bit addresses (MOVX @DPTR). In  
this application, it uses strong internal pullups when  
emitting 1’s. During accesses to external Data Memory  
that use 8 bit addresses (MOVX @Ri), Port 2 emits the  
contents of the P2 Special Function Register.  
Circuit Ground Potential.  
VCC  
Supply voltage during normal, Idle, and Power Down  
operation.  
Port 0  
Port 0 is an 8 bit open drain bi-directional I/O port. Port 0  
pins that have 1’s written to them float, and in that state  
can be used as high-impedance inputs.  
Port 0 is also the multiplexed low-order address and data  
bus during accesses to external Program and Data  
Memory. In this application it uses strong internal pullups  
when emitting 1’s. Port 0 also outputs the code bytes  
during program verification in the 83C154. External  
pullups are required during program verification. Port 0  
can sink eight LS TTL inputs.  
It also receives the high-order address bits and control  
signals during program verification in the 83C154. Port  
2 can sink or source three LS TTL inputs. It can drive  
CMOS inputs without external pullups.  
Port 3  
Port 3 is an 8 bit bi-directional I/O port with internal  
pullups. Port 3 pins that have 1’s written to them are  
pulled high by the internal pullups, and in that state can  
be used as inputs. As inputs, Port 3 pins that are externally  
being pulled low will source current (ILL, on the data  
sheet) because of the pullups. It also serves the functions  
of various special features of the TEMIC 51 Family, as  
listed below.  
Port 1  
Port 1 is an 8 bit bi-directional I/O port with internal  
pullups. Port 1 pins that have 1’s written to them are  
pulled high by the internal pullups, and in that state can  
be used as inputs. As inputs, Port 1 pins that are externally  
being pulled low will source current (IIL, on the data  
sheet) because of the internal pullups.  
Port Pin  
Alternate Function  
Port 1 also receives the low-order address byte during  
program verification. In the 83C154, Port 1 can sink or  
source three LS TTL inputs. It can drive CMOS inputs  
without external pullups.  
P3.0  
P3.1  
P3.2  
P3.3  
P3.4  
P3.5  
P3.6  
P3.7  
RXD (serial input port)  
TXD (serial output port)  
INT0 (external interrupt 0)  
INT1 (external interrupt 1)  
TD (Timer 0 external input)  
T1 (Timer 1 external input)  
WR (external Data Memory write strobe)  
RD (external Data Memory read strobe)  
2 inputs of PORT 1 are also used for timer/counter 2 :  
P1.0 [T2] : External clock input for timer/counter 2. P1.1  
[T2EX] : A trigger input for timer/counter 2, to be  
reloaded or captured causing the timer/counter 2  
interrupt.  
Port 3 can sink or source three LS TTL inputs. It can drive  
CMOS inputs without external pullups.  
RST  
A high level on this for two machine cycles while the  
oscillator is running resets the device. An internal  
pull-down resistor permits Power-On reset using only a  
capacitor connected to VCC. As soon as the result is  
applied (Vin), PORT 1, 2 and 3 are tied to 1. This  
operation is achieved asynchronously even if the  
oscillator is not start up.  
4
MATRA MHS  
Rev.F (14 Jan. 97)