80C32/80C52
MATRA MHS
External Clock Drive Characteristics (XTAL1)
SYMBOL
FCLCL
PARAMETER
Oscillator Frequency
Oscillator period
High Time
MIN
MAX
UNIT
MHz
ns
44
TCLCL
TCHCX
TCLCX
TCLCH
TCHCL
22.7
5
ns
Low Time
5
ns
Rise Time
5
5
ns
Fall Time
ns
External Clock Drive Waveforms
AC Testing Input/Output Waveforms
AC inputs during testing are driven at Vcc – 0.5 for a logic “1” and 0.45 V for a logic “0”. Timing measurements are
made at VIH min for a logic “1” and VIL max for a logic “0”.
Float Waveforms
For timing purposes as port pin is no longer floating when a 100 mV change from load voltage occurs and begins to
float when a 100 mV change from the loaded VOH/VOL level occurs. Iol/IoH ≥ ± 20 mA.
18
Rev. E (31/08/95)
TEMIC [ TEMIC SEMICONDUCTORS ]
