M67206F
TRSLRSH
TWHRSH
TRSHWL
RETRANSMIT CYCLE
TRTLWL
tRS
Reset pulse width (5)
Reset set-up time
Reset recovery time
15
20
10
-
-
-
30
30
10
-
-
-
ns
ns
ns
tRSS
tRSR
tRTC
tRT
Retransmit cycle time
25
15
15
10
-
-
-
-
40
30
30
10
-
-
-
-
ns
ns
ns
ns
TRTLRTH
TWHRTH
TRTHWL
FLAGS
Retransmit pulse width (5)
Retransmit set-up time (6)
Retransmit recovery time
tRTS
tRTR
TRSLEFL
TRSLFFH
TRLEFL
tEFL
tHFH, tFFH
tREF
Reset to EF low
-
-
25
25
15
25
-
-
-
30
30
30
30
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Reset to HF/FF high
Read low to EF low
Read high to FF high
Read width after EF high
Write high to EF high
Write low to FF low
Write low to HF low
Read high to HF high
Write width after FF high
-
-
TRHFFH
tRFF
-
-
TEFHRH
tRPE
15
-
30
-
TWHEFH
TWLFFL
tWEF
15
20
30
30
-
30
30
30
30
-
tWFF
-
-
TWLHFL
tWHF
tRHF
-
-
TRHHFH
TFFHWH
EXPANSION
TWLXOL
TWHXOH
TXILXIH
-
-
tWPF
15
30
tXOL
tXOH
tXI
Read/Write to XO low
Read/Write to XO high
XI pulse width
-
15
15
-
-
30
30
-
ns
ns
ns
ns
ns
-
-
15
10
10
30
10
10
TXIHXIL
tXIR
tXIS
XI recovery time
XI set-up time
-
-
TXILRL
-
-
1.
STD symbol.
ALT symbol.
Timings referenced as in ac test conditions.
All parameters tested only.
Pulse widths less than minimum value are not allowed.
Values guaranteed by design, not currently tested.
Only applies to read data flow-through mode.
2.
3.
4.
5.
6.
7.
12
Rev. E–20-Aug-01
TEMIC [ TEMIC SEMICONDUCTORS ]
