4-1/2 DIGIT ANALOG-TO-DIGITAL
CONVERTER WITH ON-CHIP LCD DRIVERS
TC7129
PIN DESCRIPTIONS
Pin No.
40-Pin
TC7129CPL
Pin No.
Pin No.
44-Pin
TC7129CLW Symbol
44-Pin
TC7129CKW
Function
1
2
40
41
2
3
OSC1
OSC3
Input to first clock inverter.
Output of second clock inverter.
Backplane square-wave output for driving annunciators.
Output to display segments.
Output to display segments.
Output to display segments.
Output to display segments.
Output to display segments.
Output to display segments.
Output to display segments.
Output to display segments.
Output to display segments.
Output to display segments.
Output to display segments.
Output to display segments.
Backplane #3 output to display.
Backplane #2 output to display.
Backplane #1 output to display.
Negative rail for display drivers.
3
ANNUNCIATOR
B1, C1, CONT
A1, G1, D1
F1, E1, DP1
B2, C2, LO BATT
A2, G2, D2
F2, E2, DP2
B3, C3, MINUS
A3, G3, D3
F3, E3, DP3
B4, C4, BC5
A4, D4, G4
F4, E4, DP4
BP3
4
43
44
1
5
5
6
6
7
7
2
8
8
3
9
9
4
10
11
13
14
15
16
17
18
19
20
21
22
10
11
12
13
14
15
16
17
18
19
20
5
7
8
9
10
11
12
13
14
15
16
BP2
BP1
VDISP
DP4/OR
Input: When HI, turns on most significant decimal point.
Output: Pulled HI when result count exceeds ±19,999.
21
22
18
19
24
25
DP3/UR
Input: Second most significant decimal point on when HI.
Output: Pulled HI when result count is less than ±1000.
LATCH/HOLD
Input: When floating, ADC operates in the free-run mode.
When pulled HI, the last displayed reading is held. When
pulled LO, the result counter contents aren shown
inincrementing during the deintegrate phase of cycle.
Output: Negative-going edge occurs when the data latches
are updated. Can be used for converter status signal.
23
24
20
26
27
V–
V+
Negative power supply terminal.
Positive power supply terminal and positive rail for display
drivers.
25
26
27
21
23
24
28
29
30
INT IN
INT OUT
Input to integrator amplifier.
Output of integrator amplifier.
CONTINUITY
Input: When LO, continuity flag on the display is OFF.
When HI, continuity flag is ON.
Output: HI when voltage between inputs is less than +200
mV. LO when voltage between inputs is more than +200
mV.
28
25
31
COMMON
C+REF
Sets common-mode voltage of 3.2V below V+ for DE,
10X, etc. Can be used as preregulator for external
reference.
29
30
31
32
33
26
27
29
30
31
32
33
35
36
37
Positive side of external reference capacitor.
Negative side of external reference capacitor.
Output of buffer amplifier.
–
CREF
BUFFER
IN LO
Negative input voltage terminal.
IN HI
Positive input voltage terminal.
3-234
TELCOM SEMICONDUCTOR, INC.
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
