5V PRECISION DATA ACQUISITION
SUBSYSTEMS
TC530
TC534
3. Calculate LOAD VALUE
7. Calculate VREF
LOAD VALUE = 256 – (tINT)(FIN)/1024 = [128]10
[128]10 = 80 hex
VREF (in Volts = (VS – 0.9)(CINT)(RINT
)
2(tINT
)
4. Calculate RINT
= (4.1)(0.33x10 –6)(105)/2(.066)
RINT (in MΩ) = VINMAX/20 = 2/20 = 100kΩ
= 1.025V
5. Calculate CINT for maximum (4V) integrator out-
put swing
Power Supply Sequencing
CINT (in µF) = (tINT)(20 x 10 –6)/ (VS – 0.9)
Improper sequencing of the power supply inputs (VDD
vs. VCCD) can potentially cause an improper power-up
sequence to occur. See Circuit Design/Layout Consider-
ations below. Failing to insure a proper power-up sequence
can cause spurious operation.
= (.066)(20 x 10 –6)/(4.1)
= .32µF (use closest value: 0.33µF)
NOTE: TelCom recommended capacitor:
WIMA p/n: MK12 .33/63/10
Ciruit Design/Layout Considerations
6. Choose CREF and CAZ based on conversion rate
Conversions/sec= 1/(tAZ + tINT + 2tINT + 2msec)
= 1/(66msec + 66msec + 132msec
+ 2msec)
(1) Separate ground return paths should be used for the
analog and digital circuitry. Use of ground planes and trace
fill on analog circuit sections is highly recommended
EXCEPT for in and around the integrator section and
CREF, CAZ. (CINT, CREF, CAZ, RINT). Stray capacitance be-
tween these nodes and ground appears in parallel with the
componentsthemselvesandcanaffectmeasurementaccu-
racy.
= 3.7 conversions/sec
from which CAZ = CREF = 0.22µF (see Table 1)
NOTE: TelCom recommended capacitor:
WIMA p/n: MK12 .22/63/10
+5V
+5V
C1
.01µF
10µF
V
+
–
DD
RESET
IN1
IN1
V
CCD
.01µF
100Ω
V
DD
IN2+
IN2–
(Optional)
INT
EOC
Analog
Inputs
I/O
I/O
R/W
IN3+
IN3–
V
CCD
PROCESSOR
DOUT
.01µF
1µF
I/O
I/O
IN4+
IN4–
DIN
DCLK
TC534
CINT
OSCIN
CAZ
CIN
0.33µF
X1: 2MHz
+5V
0.22µF
OSCOUT
VSS
CAZ
–5V
BUF
1µF
R NT
I
100k
R1
DGND
100k
C+REF
CREF
R2
100k
0.22µF
CR–EF
A0
VR+EF
TC04
MUX
(1.25V VREF
)
(1.03V)
Channel
Control
A1
VR–EF
CAP+
ACOM
1µF
CAP–
Figure 6. TC530/534 Typical Application
3-58
TELCOM SEMICONDUCTOR, INC.