MICROPROCESSOR MONITOR
1
TC1232
specified.
AC ELECTRICAL CHARACTERISTICS: (Cont.
)
T
A
= T
MIN
to T
MAX
; V
CC
= +5V to +10%, unless otherwise
Symbol
t
R
t
RPD
t
RPU
NOTES:
1.
2.
3.
4.
5.
6.
Parameter
V
CC
Rise Time (Note 4)
V
CC
Detect to RST High
and RST Low
V
CC
Detect to RST High
and RST Open (Note 6)
Test Conditions
Figure 6
Figure 7, V
CC
Falling
Figure 8, V
CC
Rising
Min
0
—
250
Typ
—
—
610
Max
—
100
1000
Units
µsec
nsec
msec
2
3
PB RST is internally pulled up to V
CC
with an internal impedance of typically 40kΩ.
Measured with outputs open.
All voltages referenced to GND.
Guaranteed by design.
PB RST must be held low for a minimum of 20msec to guarantee a reset.
t
R
= 5µsec.
PIN CONFIGURATIONS
8-Pin PDIP
PB RST
TD
TOL
GND
4
1
2
3
8
7
V
CC
ST
RST
RST
PB RST
TD
TOL
GND
5
1
2
3
4
8-Pin SOIC
8
7
V
CC
ST
RST
RST
NC
PB RST
NC
TD
NC
TOL
NC
GND
16-Pin SOIC Wide
1
2
3
4
5
6
7
8
16
NC
15
V
CC
14
NC
13
ST
4
5
6
7
TC1232CPA
TC1232EPA
6
TC1232COA
TC1232EOA
6
5
TC1232COE
TC1232EOE
12
NC
11
RST
10
NC
9
RST
PIN DESCRIPTION
Pin No.
Pin No.
Pin No.
(8-Pin PDIP) (8-Pin SOIC) (16-Pin SOIC) Symbol Description
1
1
2
PB RST Push-button Reset Input. A debounced active-low input that ignores
pulses less than 1msec in duration and is guaranteed to recognize inputs
of 20msec or greater.
TD
Time Delay Set. The watchdog time-out select input (t
TD
= 150msec for
TD = 0V, t
TD
= 600msec for TD = open, t
TD
= 1.2sec for TD = V
CC
).
TOL
Tolerance Input. Connect to GND for 5% tolerance or to V
CC
for 10%
tolerance.
GND Ground.
RST Reset Output (Active High) - goes active:
1. If V
CC
falls below the selected reset voltage threshold
2. If PB RST is forced low
3. If ST is not strobed within the minimum time-out period
4. During power-up
RST Reset Output (Active Low, Open Drain) - see RST.
ST
Strobe Input. Input for watchdog timer.
V
CC
The +5V Power-Supply Input.
NC
No Internal Connection.
2
3
4
5
2
3
4
5
4
6
8
9
6
7
8
6
7
8
11
13
15
1, 3, 5, 7, 10,
12, 14, 16
8
TELCOM SEMICONDUCTOR, INC.
5-21
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
