100mA CMOS LDO WITH SHUTDOWN
AND ERROR OUTPUT
PRELIMINARY INFORMATION
TC1055
In this example, the TC1055 dissipates a maximum of
only 60mW; far below the allowable limit of 318mW. In a
similar manner, Equation 1 and Equation 2 can be used to
calculate maximum current and/or input voltage limits. For
example, the maximum allowable VIN is found by substitut-
ing the maximum allowable power dissipation of 318mW
into Equation 1, from which VINMAX = 5.9V.
PD ≈ (VIN
VOUT
ILOAD
)
MIN MAX
–
MAX
Where:
PD = Worst case actual power dissipation
= Maximum voltage on VIN
VIN
MAX
VOUT
= Minimum regulator output voltage
MIN
ILOADMAX = Maximum output (load) current
Layout Considerations
Equation 1.
The primary path of heat conduction out of the package
is via the package leads. Therefore, layouts having a
ground plane, wide traces at the pads, and wide power
supply bus lines combine to lower θJA and therefore in-
crease the maximum allowable power dissipation limit.
The maximum allowable power dissipation (Equation 2)
is a function of the maximum ambient temperature (TAMAX),
the maximum allowable die temperature (125°C) and the
thermal resistance from junction-to-air (θJA). SOT-23A-5
package has a θJA of approximately 220°C/Watt when
mounted on a single layer FR4 dielectric copper clad PC
board.
PD MAX (TJMAX – TJ
)
=
MAX
θJA
Where all terms are previously defined.
Equation 2.
Equation 1 can be used in conjunction with Equation 2
to ensure regulator thermal operation is within limits. For
example:
Given:
VIN
= 3.0V ±5%
MAX
VOUT
= 2.7V ±0.5V
MIN
ILOAD = 40mA
TAMAX = 55°C
Find: 1. Actual power dissipation
2. Maximum allowable dissipation
Actual power dissipation:
PD ≈ (VIN
VOUT
ILOAD
)
MIN MAX
–
MAX
= [(3.0 x 1.05) – (2.7 x .995)]40 x 10–3
= 18.5mW
Maximum allowable power dissipation:
PDMAX = (TJMAX – TAMAX
)
θJA
= (125 – 55)
220
= 318mW
TC1055-01 6/5/97
5
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