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SLOS597 – DECEMBER 2008
DEVICE PINOUT
RTE (QFN) PACKAGE
(TOP VIEW)
OUTL
SGND
VDD
14
16
15
INL-
1
INL+
2
INR+
3
INR-
4
6
7
5
8
13
12
11
10
9
EN
HPVDD
CPP
PGND
CPN
G0
OUTR
G1
PIN FUNCTIONS
PIN
NAME
INL-
INL+
INR+
INR-
OUTR
G0
G1
HPVSS
CPN
PGND
CPP
HPVDD
EN
VDD
SGND
OUTL
Thermal
Pad
QFN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
–
I/O/P
I
I
I
I
O
I
I
P
P
P
P
P
I
P
I
O
P
PIN DESCRIPTION
Inverting left input for differential signals; left input for single-ended signals
Non-inverting left input for differential signals. Connect to ground for single-ended input applications
Non-inverting right input for differential signals. Connect to ground for single-ended input applications
Inverting right input for differential signals; right input for single-ended signals
Right headphone amplifier output. Connect to right terminal of headphone jack
Gain select
Gain select
Charge pump output and negative power supply for output amplifiers; connect 1µF capacitor to GND
Charge pump negative flying cap. Connect to negative side of 1µF capacitor between CPP and CPN
Ground
Charge pump positive flying cap. Connect to positive side of 1µF capacitor between CPP and CPN
Positive power supply for headphone amplifiers. Connect to a 2.2µF capacitor. Do not connect to VDD
Amplifier enable. Connect to logic low to shutdown; connect to logic high to activate
Positive power supply for TPA6132A2
Amplifier reference voltage. Connect to ground terminal of headphone jack
Left headphone amplifier output. Connect to left terminal of headphone jack
Solder the exposed metal pad on the TPA6132A2RTE QFN package to the landing pad on the PCB.
Connect the landing pad to ground or leave it electrically unconnected (floating).
HPVSS
Copyright © 2008, Texas Instruments Incorporated
3
Product Folder Link(s) :TPA6132A2
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
