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CC2538 参数 Datasheet PDF下载

CC2538图片预览
型号: CC2538
PDF下载: 下载PDF文件 查看货源
内容描述: 强大的系统级芯片为2.4GHz的IEEE 802.15.4 , 6LoWPAN的和ZigBee应用 [A Powerful System-On-Chip for 2.4-GHz IEEE 802.15.4, 6LoWPAN and ZigBee Applications]
分类和应用:
文件页数/大小: 24 页 / 808 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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CC2538  
www.ti.com  
SWRS096A DECEMBER 2012REVISED APRIL 2013  
ADC CHARACTERISTICS  
TA = 25°C and VDD = 3 V, unless otherwise noted.  
PARAMETER  
TEST CONDITIONS  
VDD is voltage on AVDD5 pin  
MIN  
0
TYP MAX  
VDD  
UNIT  
V
Input voltage  
External reference voltage  
External reference voltage differential  
Input resistance, signal  
VDD is voltage on AVDD5 pin  
0
VDD  
V
VDD is voltage on AVDD5 pin  
0
VDD  
V
Using 4-MHz clock speed  
197  
kΩ  
V
Full-scale signal(1)  
Peak-to-peak, defines 0 dBFS  
2.97  
5.7  
Single-ended input, 7-bit setting  
Single-ended input, 9-bit setting  
Single-ended input, 10-bit setting  
Single-ended input, 12-bit setting  
Differential input, 7-bit setting  
7.5  
9.3  
10.8  
6.5  
ENOB(1)  
Effective number of bits  
Bits  
Differential input, 9-bit setting  
8.3  
Differential input, 10-bit setting  
Differential input, 12-bit setting  
7-bit setting, both single and differential  
Single-ended input, 12-bit setting, –6 dBFS  
Differential input, 12-bit setting, –6 dBFS  
Single-ended input, 12-bit setting  
Differential input, 12-bit setting  
Single-ended input, 12-bit setting, –6 dBFS  
Differential input, 12-bit setting, –6 dBFS  
10.0  
11.5  
0–20  
–75.2  
–86.6  
70.2  
79.3  
78.8  
88.9  
Useful power bandwidth  
Total harmonic distortion  
kHz  
dB  
THD(1)  
Signal to nonharmonic ratio(1)  
dB  
dB  
Differential input, 12-bit setting, 1-kHz sine (0  
dBFS), limited by ADC resolution  
CMRR  
Common-mode rejection ratio  
Crosstalk  
>84  
Single-ended input, 12-bit setting, 1-kHz sine  
(0 dBFS), limited by ADC resolution  
< – 84  
dB  
Offset  
Midscale  
–3  
0.68%  
0.05  
0.9  
mV  
Gain error  
12-bit setting, mean  
DNL(1)  
INL(1)  
Differential nonlinearity  
Integral nonlinearity  
LSB  
LSB  
12-bit setting, maximum  
12-bit setting, mean  
4.6  
12-bit setting, maximum  
Single-ended input, 7-bit setting  
Single-ended input, 9-bit setting  
Single-ended input, 10-bit setting  
Single-ended input, 12-bit setting  
Differential input, 7-bit setting  
Differential input, 9-bit setting  
Differential input, 10-bit setting  
Differential input, 12-bit setting  
7-bit setting  
13.3  
35.4  
46.8  
57.5  
66.6  
40.7  
51.6  
61.8  
70.8  
20  
SINAD(1)  
(–THD+N)  
Signal-to-noise-and-distortion  
dB  
9-bit setting  
36  
Conversion time  
μs  
10-bit setting  
68  
12-bit setting  
132  
1.2  
Current consumption  
mA  
V
Internal reference voltage  
1.19  
2
Internal reference VDD coefficient  
Internal reference temperature coefficient  
mV/V  
mV/10°C  
0.4  
(1) Measured with 300-Hz sine-wave input and VDD as reference  
Copyright © 2012–2013, Texas Instruments Incorporated  
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