C2510Fx / CC2511Fx
3
Key Features (in more details)
3.1 High-Performance and Low-Power
8051-Compatible Microcontroller
• Typically used to connect to external
DAC or ADC
• Optimized 8051 core which typically
gives 8x the performance of a standard
8051
3.5 Hardware AES Encryption/Decryption
• 128-bit AES supported in hardware
• Two data pointers
coprocessor
• In-circuit interactive debugging is
supported by the IAR Embedded
Workbench through a simple two-wire
serial interface
3.6 Peripheral Features
• Powerful DMA Controller
• Power On Reset/Brown-Out Detection
3.2 8/16/32 kB Non-volatile Program
Memory and 1/2/4 kB Data Memory
• ADC with eight individual input
channels, single-ended or differential
(CC2511Fx has six channels) and
configurable resolution
• 8, 16, or 32 kB of non-volatile flash
memory,
in-system
programmable
through a simple two-wire interface or
by the 8051 core
• Programmable watchdog timer
• Five timers: one general 16-bit timer
with DSM mode, two general 8-bit
timers, one MAC timer, and one sleep
timer
• Minimum flash memory endurance:
1000 write/erase cycles
• Programmable read and write lock of
portions of flash memory for software
security
• Two
programmable
master/slave SPI or UART operation
USARTs
for
• 1, 2, or 4 kB of internal SRAM
• 21 configurable general-purpose digital
I/O-pins (CC2511Fx has 19)
3.3 Full-Speed USB Controller (CC2511Fx )
• Random number generator
• 5 bi-directional endpoints in addition to
control endpoint 0
3.7 Low Power
• Full-Speed, 12 Mbps transfer rate
• Four flexible power modes for reduced
power consumption
• Support for Bulk, Interrupt, and
Isochronous endpoints
• System can wake up on external
interrupt or when the Sleep Timer
expires
• 1024 bytes of dedicated endpoint FIFO
memory
• 0.5 µA current consumption in PM2,
where external interrupts or the Sleep
Timer can wake up the system
• 8 – 512 byte data packet size supported
• Configurable FIFO size for IN and OUT
direction of endpoint
• 0.3 µA current consumption in PM3,
where external interrupts can wake up
the system
3.4 I2S Interface
• Industry standard I2S interface for
• Low-power fully static CMOS design
transfer of digital audio data
• System clock source is either a high
speed crystal oscillator (24 – 27 MHz for
CC2510Fx and 48 MHz for CC2511Fx) or a
high speed RC oscillator (12 – 13.5 MHz
for CC2510Fx and 12 MHz for CC2511Fx).
The high speed crystal oscillator must
be used when the radio is active.
• Full duplex
• Mono and stereo support
• Configurable sample rate and sample
size
• Support for µ-law compression and
expansion
SWRS055D
Page 6 of 243
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