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CC2510F32RSP 参数 Datasheet PDF下载

CC2510F32RSP图片预览
型号: CC2510F32RSP
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的SoC (系统级芯片)与MCU,存储器, 2.4 GHz射频收发器和USB控制器 [Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller]
分类和应用: 存储电信集成电路射频控制器PC
文件页数/大小: 244 页 / 2899 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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C2510Fx / CC2511Fx  
7.2 RF Receive Section  
TA = 25 °C, VDD = 3.0 V if nothing else stated. All measurement results are obtained using the  
CC2510EM reference design ([1]).  
Parameter  
Min  
Typ  
Max  
Unit Condition/Note  
kHz User programmable (see Section 14.6). The bandwidth limits are  
Digital channel  
filter bandwidth  
58  
812  
proportional to crystal frequency (given values assume a 26.0 MHz  
crystal).  
2.4 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0  
(2-FSK, 1% packet error rate, 20 bytes packet length, 203 kHz digital channel filter bandwidth)  
The RX current consumption can be reduced by approximately 2.4 mA  
by setting MDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivity is then  
-101 dBm.  
Receiver  
sensitivity  
-103  
dBm  
The sensitivity can be improved to typically -105 dBm with  
MDMCFG2.DEM_DCFILT_OFF=0 by changing registers TEST2and  
TEST1(see Page 227). The temperature range is then from 0 oC to +85  
oC.  
Saturation  
-10  
23  
dBm  
dB  
Adjacent  
channel  
rejection  
Desired channel 3 dB above the sensitivity limit. 250 kHz channel  
spacing  
Alternate  
channel  
rejection  
32  
dB  
Desired channel 3 dB above the sensitivity limit. 250 kHz channel  
spacing  
See Figure 54 for plot of selectivity versus frequency offset  
Blocking  
±10 MHz offset  
±20 MHz offset  
±50 MHz offset  
64  
70  
71  
dB  
dB  
dB  
Wanted signal 3 dB above sensitivity level.  
Compliant with ETSI EN 300 440 class 2 receiver requirements.  
10 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0  
(2-FSK, 1% packet error rate, 20 bytes packet length, 232 kHz digital channel filter bandwidth)  
Receiver  
sensitivity  
-98  
dBm The RX current consumption can be reduced by approximately 2.2 mA  
by setting MDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivity is then  
-97 dBm.  
The sensitivity can be improved to typically -100 dBm with  
MDMCFG2.DEM_DCFILT_OFF=0 by changing registers TEST2and  
TEST1(see Page 227). The temperature range is then from 0 oC to +85  
oC.  
Saturation  
-9  
dBm  
Adjacent  
channel  
rejection  
19  
dB  
Desired channel 3 dB above the sensitivity limit. 250 kHz channel  
spacing  
Alternate  
channel  
rejection  
25  
dB  
Desired channel 3 dB above the sensitivity limit. 250 kHz channel  
spacing  
See Figure 55 for plot of selectivity versus frequency offset  
Blocking  
±10 MHz offset  
±20 MHz offset  
±50 MHz offset  
59  
65  
66  
dB  
dB  
dB  
Wanted signal 3 dB above sensitivity level.  
Compliant with ETSI EN 300 440 class 2 receiver requirements.  
SWRS055D  
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