C2510Fx / CC2511Fx
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PERIPHERALS....................................................................................................................................... 74
13.1 POWER MANAGEMENT AND CLOCKS.......................................................................................................... 74
13.2 RESET......................................................................................................................................................... 81
13.3 FLASH CONTROLLER .................................................................................................................................. 82
13.4 I/O PORTS................................................................................................................................................... 88
13.5 DMA CONTROLLER ................................................................................................................................... 99
13.6 16-BIT TIMER, TIMER 1............................................................................................................................. 111
13.7 MAC TIMER (TIMER 2) ............................................................................................................................ 123
13.8 SLEEP TIMER ............................................................................................................................................ 125
13.9 8-BIT TIMERS, TIMER 3 AND TIMER 4 ....................................................................................................... 129
13.10 ADC......................................................................................................................................................... 140
13.11 RANDOM NUMBER GENERATOR............................................................................................................... 146
13.12 AES COPROCESSOR.................................................................................................................................. 147
13.13 WATCHDOG TIMER................................................................................................................................... 150
13.14 USART.................................................................................................................................................... 152
13.15 I2S ............................................................................................................................................................ 163
13.16 USB CONTROLLER ................................................................................................................................... 170
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RADIO.................................................................................................................................................... 187
14.1 COMMAND STROBES ................................................................................................................................ 187
14.2 RADIO REGISTERS .................................................................................................................................... 189
14.3 INTERRUPTS.............................................................................................................................................. 189
14.4 TX/RX DATA TRANSFER ......................................................................................................................... 191
14.5 DATA RATE PROGRAMMING..................................................................................................................... 192
14.6 RECEIVER CHANNEL FILTER BANDWIDTH................................................................................................ 192
14.7 DEMODULATOR, SYMBOL SYNCHRONIZER, AND DATA DECISION............................................................ 193
14.8 PACKET HANDLING HARDWARE SUPPORT ............................................................................................... 194
14.9 MODULATION FORMATS........................................................................................................................... 197
14.10 RECEIVED SIGNAL QUALIFIERS AND LINK QUALITY INFORMATION......................................................... 198
14.11 FORWARD ERROR CORRECTION WITH INTERLEAVING.............................................................................. 202
14.12 RADIO CONTROL ...................................................................................................................................... 203
14.13 FREQUENCY PROGRAMMING .................................................................................................................... 206
14.14 VCO......................................................................................................................................................... 207
14.15 OUTPUT POWER PROGRAMMING .............................................................................................................. 207
14.16 SELECTIVITY ............................................................................................................................................ 209
14.17 SYSTEM CONSIDERATIONS AND GUIDELINES............................................................................................ 211
14.18 RADIO REGISTERS .................................................................................................................................... 213
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VOLTAGE REGULATORS ................................................................................................................ 231
15.1 VOLTAGE REGULATOR POWER-ON........................................................................................................... 231
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RADIO TEST OUTPUT SIGNALS..................................................................................................... 231
REGISTER OVERVIEW..................................................................................................................... 232
PACKAGE DESCRIPTION (QLP 36)................................................................................................ 236
18.1 RECOMMENDED PCB LAYOUT FOR PACKAGE (QLP 36) .......................................................................... 237
18.2 SOLDERING INFORMATION........................................................................................................................ 237
18.3 TRAY SPECIFICATION ............................................................................................................................... 237
18.4 CARRIER TAPE AND REEL SPECIFICATION................................................................................................ 238
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ORDERING INFORMATION............................................................................................................. 238
REFERENCES ...................................................................................................................................... 239
GENERAL INFORMATION............................................................................................................... 240
21.1 DOCUMENT HISTORY ............................................................................................................................... 240
21.2 PRODUCT STATUS DEFINITIONS ............................................................................................................... 241
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ADDRESS INFORMATION................................................................................................................ 242
TI WORLDWIDE TECHNICAL SUPPORT..................................................................................... 242
SWRS055D
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