CC2430
8051 CPU : Memory
Description
Register name
SFR
Module
Address
T2OF0
0xA1
0xA2
0xA3
0xA4
0xA5
0xA6
0xA7
0xC3
0xCA
0xCB
0xCC
0xCD
0xCE
0xCF
0xEA
0xEB
0xEC
0xED
0xEE
0xEF
0xD8
0x86
0xC1
0xC2
0xC4
0xC5
0xF8
0xF9
0xFA
0xFB
0xFC
0xC9
Timer2
Timer2
Timer2
Timer2
Timer2
Timer2
Timer2
Timer2
Timer3
Timer3
Timer3
Timer3
Timer3
Timer3
Timer4
Timer4
Timer4
Timer4
Timer4
Timer4
TMINT
USART0
USART0
USART0
USART0
USART0
USART1
USART1
USART1
USART1
USART1
WDT
Timer 2 Overflow Count 0
T2OF1
Timer 2 Overflow Count 1
T2OF2
Timer 2 Overflow Count 2
T2CAPLPL
T2CAPHPH
T2TLD
Timer 2 Timer Period Low
Timer 2 Timer Period High
Timer 2 Timer Value Low
T2THD
Timer 2 Timer Value High
T2CNF
Timer 2 Configuration
T3CNT
Timer 3 Counter
T3CTL
Timer 3 Control
T3CCTL0
T3CC0
Timer 3 Channel 0 Compare Control
Timer 3 Channel 0 Compare Value
Timer 3 Channel 1Compare Control
Timer 3 Channel 1 Compare Value
Timer 4 Counter
T3CCTL1
T3CC1
T4CNT
T4CTL
Timer 4 Control
T4CCTL0
T4CC0
Timer 4 Channel 0 Compare Control
Timer 4 Channel 0 Compare Value
Timer 4 Channel 1 Compare Control
Timer 4 Channel 1 Compare Value
Timers 1/3/4 Joint Interrupt Mask/Flags
USART 0 Control and Status
USART 0 Receive/Transmit Data Buffer
USART 0 Baud Rate Control
USART 0 UART Control
T4CCTL1
T4CC1
TIMIF
U0CSR
U0DBUF
U0BAUD
U0UCR
U0GCR
U1CSR
U1DBUF
U1BAUD
U1UCR
U1GCR
WDCTL
USART 0 Generic Control
USART 1 Control and Status
USART 1 Receive/Transmit Data Buffer
USART 1 Baud Rate Control
USART 1 UART Control
USART 1 Generic Control
Watchdog Timer Control
RFR Registers. The RFR registers are all
related to Radio configuration and control.
These registers can only be accessed through
the XDATA memory space. A complete
description of each register is given in section
14.35 on page 183. Table 26 gives an
overview of the register address space while
Table 27 gives a more descriptive overview of
these registers. Note that shaded areas in
Table 26 are registers for test purposes only.
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 37 of 211