CC2430
Peripherals : ADC
ADCH (0xBB) – ADC Data High
Bit
Name
Reset
R/W
Description
7:0
0x00
R
Most significant part of ADC conversion result.
ADC[13:6]
ADCCON1 (0xB4) – ADC Control 1
Bit
Name
Reset
R/W
Description
7
0
R
End of conversion Cleared when ADCH has been read. If a new
conversion is completed before the previous data has been read,
the EOC bit will remain high.
EOC
H0
0
1
conversion not complete
conversion completed
6
0
R/W1
R/W
Start conversion. Read as 1 until conversion has completed
ST
0
1
no conversion in progress
start a conversion sequence if ADCCON1.STSEL = 11
and no sequence is running.
5:4
11
Start select. Selects which event that will start a new conversion
sequence.
STSEL[1:0]
00
01
10
11
External trigger on P2_0 pin.
Full speed. Do not wait for triggers.
Timer 1 channel 0 compare event
ADCCON1.ST = 1
3:2
1:0
00
11
R/W
R/W
Controls the 16 bit random number generator. When written 01, the
setting will automatically return to 00 when operation has
completed.
RCTRL[1:0]
00
01
10
11
Normal operation. (13x unrolling)
Clock the LFSR once (no unrolling).
Reserved
Stopped. Random number generator is turned off.
-
Reserved. Always set to 11.
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 131 of 211
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
