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CC2430EMK 参数 Datasheet PDF下载

CC2430EMK图片预览
型号: CC2430EMK
PDF下载: 下载PDF文件 查看货源
内容描述: 真正的系统级芯片解决方案的2.4 GHz IEEE 802.15.4 / ZigBee的 [A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee]
分类和应用:
文件页数/大小: 212 页 / 1862 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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CC2430  
4
Features Emphasized  
4.1 High-Performance and Low-Power  
8051-Compatible Microcontroller  
4.5 Low Power  
Four flexible power modes for reduced  
power consumption  
Optimized 8051 core, which typically  
gives 8x the performance of a standard  
8051  
System can wake up on external  
interrupt or real-time counter event  
Dual data pointers  
Low-power fully static CMOS design  
In-circuit interactive debugging is  
supported for the IAR Embedded  
Workbench through a simple two-wire  
serial interface  
System clock source can be 16 MHz RC  
oscillator or 32 MHz crystal oscillator.  
The 32 MHz oscillator is used when  
radio is active  
Optional clock source for ultra-low power  
operation can be either low-power RC  
oscillator or an optional 32.768 kHz  
crystal oscillator  
4.2 Up to 128 KB Non-volatile Program  
Memory and 2 x 4 KB Data Memory  
32/64/128 KB of non-volatile flash  
memory in-system programmable  
through a simple two-wire interface or by  
the 8051 core  
4.6 IEEE 802.15.4 MAC hardware support  
Automatic preamble generator  
Worst-case flash memory endurance:  
1000 write/erase cycles  
Synchronization word insertion/detection  
CRC-16 computation and checking over  
the MAC payload  
Programmable read and write lock of  
portions of Flash memory for software  
security  
Clear Channel Assessment  
Energy detection / digital RSSI  
Link Quality Indication  
4096 bytes of internal SRAM with data  
retention in all power modes  
Additional 4096 bytes of internal SRAM  
with data retention in power modes 0  
and 1  
CSMA/CA Coprocessor  
4.7 Integrated 2.4GHz DSSS Digital Radio  
2.4 GHz IEEE 802.15.4 compliant RF  
transceiver (based on industry leading  
CC2420 radio core).  
4.3 Hardware AES Encryption/Decryption  
AES supported in hardware coprocessor  
Excellent receiver sensitivity and  
robustness to interferers  
4.4 Peripheral Features  
Powerful DMA Controller  
250 kbps data rate, 2 MChip/s chip rate  
Power On Reset/Brown-Out Detection  
Reference  
designs  
comply  
with  
Eight channel ADC with configurable  
resolution  
worldwide radio frequency regulations  
covered by ETSI EN 300 328 and EN  
300 440 class 2 (Europe), FCC CFR47  
Part 15 (US) and ARIB STD-T66  
(Japan). Transmit on 2480MHz under  
FCC is supported by duty-cycling, or by  
reducing output power.  
Programmable watchdog timer  
Real time clock with 32.768 kHz crystal  
oscillator  
Four timers: one general 16-bit timer,  
two general 8-bit timers, one MAC timer  
Two  
programmable  
USARTs  
for  
master/slave SPI or UART operation  
21 configurable general-purpose digital  
I/O-pins  
True random number generator  
CC2430 Data Sheet (rev. 2.1) SWRS036F  
Page 9 of 211