CC2430
Peripherals : Watchdog Timer
counting will start from zero. In PM1 the
watchdog is still running, but it will not reset
the chip while in PM1. This will not happen
until it is woken up (it will wrap around and
start over again when reset condition is
reached). Also note that if the chip is woken in
the watchdog timeout (reset condition) period
the chip will be reset immediately. If woke up
just prior to watchdog timeout the chip will be
reset unless SW clears the watchdog
immediately after waking up from PM1. As
the sleep timer and the watchdog run on the
same clock the watchdog timeout interval can
be aligned with sleep timer interval so SW can
be made able to reset the watchdog. For
external interrupt wakeups the max watchdog
time out period should be used and the sleep
timer set so SW can be activated to clear the
watchdog periodically while waiting for
external interrupt events.
13.13.4 Watchdog Timer Register
This section describes the register, WDCTL, for
the Watchdog Timer.
WDCTL (0xC9) – Watchdog Timer Control
Bit
Name
Reset
R/W
Description
7:4
0000
R/W
Clear timer. When 0xA followed by 0x5 is written to these bits, the
timer is loaded with 0x0. Note the timer will only be cleared when
0x5 is written within 0.5 watchdog clock period after 0xA was
CLR[3:0]
written. Writing to these bits when ENis 0 have no effect.
3
0
R/W
Enable timer. When a 1 is written to this bit the timer is enabled
and starts incrementing. Writing a 0 to this bit in timer mode stops
the timer. Writing a 0 to this bit in watchdog mode has no effect.
EN
0
1
Timer disabled (stop timer)
Timer enabled
2
0
R/W
R/W
Mode select. This bit selects the watchdog timer mode.
MODE
0
1
Watchdog mode
Timer mode
1:0
00
Timer interval select. These bits select the timer interval defined as
a given number of 32.768 kHz oscillator periods.
INT[1:0]
00
01
10
11
clock period x 32768 (typical 1 s)
clock period x 8192 (typical 0.25 s)
clock period x 512 (typical 15.625 ms)
clock period x 64 (typical 1.9 ms)
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 142 of 211