CC1110Fx / CC1111Fx
7
Electrical Specifications
7.1 Current Consumption
TA = 25 °C, VDD = 3.0 V if nothing else stated. All measurement results are obtained using the
CC1110EM reference design ([1]).
Parameter
Min
Typ
Max
Unit
Condition
Active mode, full
speed (high speed
crystal oscillator)1.
Digital regulator on. High speed crystal oscillator and low power
RCOSC running. No peripherals running.
Low CPU activity: No flash access (i.e. only cache hit), no RAM
access
Low CPU activity.
5.0
4.8
mA
mA
System clock running at 26 MHz.
System clock running at 24 MHz.
CC1111Fx runs on 48 MHz crystal giving 24 MHz system clock
System clock running at 13 MHz.
2.5
mA
Active mode, full
speed (HS
Digital regulator on. HS RCOSC and low power RCOSC running. No
peripherals running.
RCOSC)1.
Low CPU activity.
Low CPU activity: No flash access (i.e. only cache hit), no RAM
access
Digital regulator on. High speed crystal oscillator and low power
RCOSC running. Radio in RX mode (sensitivity optimized
MDMCFG2.DEM_DCFILT_OFF=1)
Active mode with
radio in RX,
315 MHz
19
19.5
16.2
19
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
1.2 kBaud, input at sensitivity limit, system clock at 26 MHz.
1.2 kBaud, input at sensitivity limit, system clock at 24 MHz
1.2 kBaud, input at sensitivity limit, system clock at 203 kHz.
1.2 kBaud, input well above sensitivity limit, system clock at 26 MHz
1.2 kBaud, input well above sensitivity limit, system clock at 24 MHz
38.4 kBaud, input at sensitivity limit, system clock at 26 MHz.
38.4 kBaud, input at sensitivity limit, system clock at 203 kHz.
38.4 kBaud, input well above sensitivity limit, system clock at 26 MHz.
250 kBaud, input at sensitivity limit, system clock at 26 MHz
250 kBaud, input at sensitivity limit, system clock at 24 MHz.
250 kBaud, input at sensitivity limit, system clock at 1.625 MHz.
250 kBaud, input well above sensitivity limit, system clock at 26 MHz.
250 kBaud, input well above sensitivity limit, system clock at 24 MHz.
19.4
19
16.2
19
20
21
17.2
20
20
1 Note: In order to reduce the current consumption in active mode, the clock speed can be reduced by
setting CLKCON.CLKSPD ≠ 000 (see section 13.1 for details). Figure 1 shows typical current
consumption in active mode for different clock speeds
SWRS033E
Page 10 of 239
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