CC1110Fx / CC1111Fx
when the SPI slave is inactive. Also note that
the rising edge on SSN must be aligned to the
end of the byte sent / received. If this is not the
case, the next received byte will be corrupted.
If there is a rising edge on SSN in the middle
of a byte, this should be followed by a USART
flush to avoid corruption of the following byte.
In SPI master mode, the SSN pin is not used.
When the USART operates as an SPI master
and a slave select signal is needed by an
external SPI slave device, a general purpose
I/O pin should be used to implement the slave
select signal function in software.
Figure 40: SPI Dataflow
13.14.3 Baud Rate Generation
difference in actual baud rate to standard baud
rate value as a percentage error.
An internal baud rate generator set up the
UART baud rate when operating in UART
mode and the SPI master clock frequency
when operating in SPI mode.
The maximum baud rate for UART mode is
F/16
(UxGCR.BAUD_E[4:0]=16
and
UxBAUD.BAUD_M[7:0]=0).
The
UxBAUD.BAUD_M[7:0]
and
The maximum baud rate for SPI master mode
UxGCR.BAUD_E[4:0] registers define the
baud rate used for UART transfers and the
rate of the serial clock (SCK) for SPI transfers.
The baud rate is given by the following
equation:
and
thus
SCK
frequency
is
F/8
and
(UxGCR.BAUD_E[4:0]=17
UxBAUD.BAUD_M[7:0]=0).
mode does not need to receive data, the
If SPI master
maximum
SPI
rate
is
F/2
(UxGCR.BAUD_E[4:0]=19
and
(256 + BAUD _ M )∗2BAUD _ E
UxBAUD.BAUD_M[7:0]=0). Setting higher
baud rates than this will give erroneous results.
For SPI slave mode the maximum baud rate is
always F/8.
Baudrate =
∗ F
228
where F is the system clock frequency set by
the selected system clock source.
Note that the baud rate must be configured
before any other UART or SPI operations take
place (the baud rate should never be changed
when UxCSR.ACTIVEis asserted).
The register values required for standard baud
rates are shown in Table 55 (F = 26 MHz) and
Table 56 (24 MHz). The tables also give the
SWRS033E
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