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CC1111F32RSP 参数 Datasheet PDF下载

CC1111F32RSP图片预览
型号: CC1111F32RSP
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗低于1 GHz的射频系统级芯片(SoC )与MCU,存储器,收发器和USB控制器 [Low-power sub-1 GHz RF System-on-Chip (SoC) with MCU, memory, transceiver, and USB controller]
分类和应用: 存储射频控制器PC
文件页数/大小: 240 页 / 2823 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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CC1110Fx / CC1111Fx  
13.8.3 Low Power RC Oscillator and Timing  
13.8.4 Sleep Timer Interrupt  
This section applies to using the low power RC  
oscillator as clock source for the Sleep Timer.  
The Sleep Timer generates the Sleep Timer  
interrupt, ST, when Event 0 occurs. This  
interrupt source can be masked using the  
WORIRQ.EVENT0_MASK interrupt mask bit.  
The interrupt flag bit WORIRQ.EVENT0_FLAG  
will be set when Event 0 occurs.  
The frequency of the low-power RC oscillator,  
which can be used as clock source for the  
Sleep Timer, varies with temperature and  
supply voltage. In order to keep the frequency  
as accurate as possible, the RC oscillator  
should be calibrated whenever possible, which  
is when the high speed crystal oscillator is  
running and the chip is in active mode or PM0.  
When the chip goes to PM1 or PM2, the RC  
oscillator will use the last valid calibration  
result. The frequency of the low power RC  
oscillator is therefore locked to fref / 750.  
13.8.5 Sleep Timer DMA Trigger  
There is one DMA trigger associated with the  
Sleep Timer. This is the DMA trigger ST,  
which is generated when Event 0 occurs.  
13.8.6 Sleep Timer Registers  
This section describes the SFRs associated  
with the Sleep Timer.  
WORTIME0 (0xA5) – Sleep Timer Low Byte  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
WORTIME[7:0]  
0x00  
R
8 LSB of the16 bits selected from the 31-bit Sleep Timer according to the  
setting of WORCTRL.WOR_RES[1:0]  
WORTIME1 (0xA6) – Sleep Timer High Byte  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
WORTIME[15:8]  
0x00  
R
8 MSB of the16 bits selected from the 31-bit Sleep Timer according to the  
setting of WORCTRL.WOR_RES[1:0]  
WOREVT1 (0xA4) – Sleep Timer Event0 Timeout High  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
EVENT0[15:8]  
0x87  
R/W  
High byte of Event 0 timeout register  
Sleep Timer clocked by low power  
RCOSC  
Sleep Timer clocked by 32.768 kHz  
crystal oscillator  
750  
1
EVENT025WOR_ RES  
tEvent0  
=
EVENT025WOR _ RES  
tEvent0  
=
fref  
32768  
WOREVT0 (0xA3) – Sleep Timer Event0 Timeout Low  
Bit  
Name  
Reset  
R/W  
Description  
Low byte of Event 0 timeout register  
7:0  
EVENT0[7:0]  
0x6B  
R/W  
SWRS033E  
Page 129 of 239  
 
 
 
 
 
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