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CC1110FX 参数 Datasheet PDF下载

CC1110FX图片预览
型号: CC1110FX
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗低于1 GHz的射频系统级芯片(SoC )与MCU,存储器,收发器和USB控制器 [Low-power sub-1 GHz RF System-on-Chip (SoC) with MCU, memory, transceiver, and USB controller]
分类和应用: 存储射频控制器
文件页数/大小: 240 页 / 2823 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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CC1110Fx / CC1111Fx  
13.4 I/O Ports  
appropriate bit within PxDIR  
corresponding pin becomes an output.  
to 1, the  
Note: P0_6 and P0_7 do not exist on CC1111Fx.  
The CC1111Fx has 19 digital input/output pins  
available and the ADC inputs A6 and A7 can  
not be used. Apart from this, all information in  
this section applies to both CC1111Fx and  
CC1110Fx. For all registers in this section, an x  
in the register name can be replaced by 0, 1,  
or, 2, referring to the port number, if nothing  
else is stated.  
When reading the port registers P0, P1, and  
P2, the logic values on the input pins are  
returned regardless of the pin configuration.  
This does not apply during the execution of  
read-modify-write instructions. The read-  
modify-write instructions are: ANL, ORL, XRL,  
JBC, CPL, INC, DEC, DJNZ, and MOV, CLR,  
or SETB. Operating on a port registers the  
following is true: When the destination is an  
individual bit in a port register P0, P1or P2the  
value of the register, not the value on the pin,  
is read, modified, and written back to the port  
register.  
The CC1110Fx has 21 digital input/output pins  
that can be configured as general purpose  
digital I/O or as peripheral I/O signals  
connected to the ADC, Timers, I2S, or USART  
peripherals. The usage of the I/O ports is fully  
configurable from user software through a set  
of configuration registers.  
When used as an input, the general purpose  
I/O port pins can be configured to have a pull-  
up, pull-down, or tri-state mode of operation.  
By default, inputs are configured as inputs with  
pull-up. To de-select the pull-up/pull-down  
function on an input the appropriate bit within  
the PxINPmust be set to 1. The I/O port pins  
P1_0 and P1_1 do not have pull-up/pull-down  
capability.  
The I/O ports have the following key features:  
21 digital input/output pins  
General purpose I/O or peripheral I/O  
Pull-up or pull-down capability on inputs,  
except on P1_0 and P1_1.  
External interrupt capability  
The external interrupt capability is available on  
all 21 I/O pins. Thus, external devices may  
generate interrupts if required. The external  
interrupt feature can also be used to wake up  
from all four power modes (PM{0-3}).  
In PM1, PM2, and PM3 the I/O pins retain the  
I/O mode and output value (if applicable) that  
was set when PM1/2/3 was entered.  
13.4.2 Unused I/O Pins  
13.4.1 General Purpose I/O  
Unused I/O pins should have a defined level  
and not be left floating. One way to do this is  
to leave the pin unconnected and configure  
the pin as a general purpose I/O input with  
pull-up resistor. This is the default state of all  
pins after reset except for P1_0 and P1_1  
which do not have pull-up/pull-down resistors  
(note that only P2_2 has pull-up during reset).  
Alternatively the pin can be configured as a  
general purpose I/O output. In both cases the  
pin should not be connected directly to VDD or  
GND in order to avoid excessive power  
consumption.  
When used as general purpose I/O, the pins  
are organized as three 8-bit ports, port 0, 1,  
and 2, denoted P0, P1, and P2. P0 and P1 are  
complete 8-bit wide ports while P2 has only  
five usable bits (P2_0 to P2_4). All ports are  
both bit- and byte addressable through the  
SFRs P0, P1 and P2. Each port pin can  
individually be set to operate as a general  
purpose I/O or as a peripheral I/O.  
Note: P1_0 and P1_1 have LED driving  
capabilities.  
To use a port as a general purpose I/O pin the  
pin must first be configured. The registers  
PxSELare used to configure each pin in a port  
either as a general purpose I/O pin or as a  
peripheral I/O signal. All digital input/output  
pins are configured as general-purpose I/O  
pins by default.  
13.4.3 Low I/O Supply Voltage  
In applications where the digital I/O power  
supply voltage VDD on pin DVDD is below 2.6  
V, the register bit PICTL.PADSCshould be set  
to  
1
in order to obtain output DC  
characteristics specified in section 7.16.  
By default, all general-purpose I/O pins are  
configured as inputs. To change the direction  
of a port pin, at any time, the registers PxDIR  
are used to set each port pin to be either an  
input or an output. Thus by setting the  
13.4.4 General Purpose I/O Interrupts  
General purpose I/O pins configured as inputs  
can be used to generate interrupts. The  
interrupts can be configured to trigger on  
SWRS033E  
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