CC1110Fx / CC1111Fx
13.9.7 Timer 3 and 4 Registers
•
•
•
T4CNT- Timer 4 Counter
T4CTL- Timer 4 Control
T4CCTLn- Timer 4 Channel n Compare
Control
T4CCn - Timer 4 Channel n Compare
Value
This section describes the following Timer 3
and Timer 4 registers:
•
•
•
T3CNT- Timer 3 Counter
T3CTL- Timer 3 Control
T3CCTLn- Timer 3 Channel n Compare
Control
•
•
TIMIF- Timer 1/3/4 Interrupt Mask/Flag
•
T3CCn - Timer 3 Channel n Compare
Value
T3CNT (0xCA) – Timer 3 Counter
Bit
Name
Reset
R/W
Description
7:0
CNT[7:0]
0x00
R
Timer count byte. Contains the current value of the 8-bit counter
T3CTL (0xCB) – Timer 3 Control
Bit
Name
Reset
R/W
Description
7:5
DIV[2:0]
000
R/W
Prescaler divider value. Generates the active clock edge used to update the
counter as follows:
000
001
010
011
100
101
110
111
Tick frequency /1
Tick frequency /2
Tick frequency /4
Tick frequency /8
Tick frequency /16
Tick frequency /32
Tick frequency /64
Tick frequency /128
Note: Changes to these bits has immediate effect on the frequency of the active
clock edges.
4
3
START
OVFIM
0
1
R/W
Start timer
0
1
Suspended
Normal operation
R/W0
Overflow interrupt mask
0
1
Interrupt disabled
Interrupt enabled
2
CLR
0
R0/W1 Clear counter. Writing a 1 resets the counter to 0x00.
This bit will be 0 when returning from PM2 and PM3
1:0
MODE[1:0]
00
R/W
Timer 3 mode select. The timer operating mode is selected as follows:
00
01
10
11
Free running, repeatedly count from 0x00 to 0xFF
Down, count from T3CC0to 0x00
Modulo, repeatedly count from 0x00 to T3CC0
Up/down, repeatedly count from 0x00 to T3CC0 and from T3CC0down
to 0x00
SWRS033E
Page 134 of 239
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