CC1110Fx / CC1111Fx
17 Register Overview
MPAGE (0x93) – Memory Page Select.................................................................................. 53
MEMCTR (0xC7) – Memory Arbiter Control........................................................................ 54
DPH0 (0x83) – Data Pointer 0 High Byte............................................................................... 54
DPL0 (0x82) – Data Pointer 0 Low Byte................................................................................ 54
DPH1 (0x85) – Data Pointer 1 High Byte............................................................................... 54
DPL1 (0x84) – Data Pointer 1 Low Byte................................................................................ 54
DPS (0x92) – Data Pointer Select ........................................................................................... 54
PSW (0xD0) – Program Status Word...................................................................................... 55
ACC (0xE0) – Accumulator.................................................................................................... 55
B (0xF0) – B Register ............................................................................................................. 55
SP (0x81) – Stack Pointer ....................................................................................................... 56
IEN1 (0xB8) – Interrupt Enable 1 Register............................................................................. 64
IEN2 (0x9A) – Interrupt Enable 2 Register ............................................................................ 65
TCON (0x88) – CPU Interrupt Flag 1..................................................................................... 66
S0CON (0x98) – CPU Interrupt Flag 2................................................................................... 67
S1CON (0x9B) – CPU Interrupt Flag 3 .................................................................................. 67
IRCON (0xC0) – CPU Interrupt Flag 4 .................................................................................. 68
IRCON2 (0xE8) – CPU Interrupt Flag 5................................................................................. 69
IP1 (0xB9) – Interrupt Priority 1............................................................................................. 69
IP0 (0xA9) – Interrupt Priority 0............................................................................................. 70
PCON (0x87) – Power Mode Control..................................................................................... 79
SLEEP (0xBE) – Sleep Mode Control................................................................................... 80
CLKCON (0xC6) – Clock Control ........................................................................................ 83
FCTL (0xAE) – Flash Control ................................................................................................ 90
FWDATA (0xAF) – Flash Write Data.................................................................................... 90
FADDRH (0xAD) – Flash Address High Byte....................................................................... 90
FADDRL (0xAC) – Flash Address Low Byte ........................................................................ 90
FWT (0xAB) – Flash Write Timing........................................................................................ 90
P0 (0x80) – Port 0 ................................................................................................................... 96
P1 (0x90) – Port 1 ................................................................................................................... 96
P2 (0xA0) – Port 2 .................................................................................................................. 96
PERCFG (0xF1) – Peripheral Control .................................................................................... 96
ADCCFG (0xF2) – ADC Input Configuration........................................................................ 97
P0SEL (0xF3) – Port 0 Function Select .................................................................................. 97
P1SEL (0xF4) – Port 1 Function Select .................................................................................. 97
P2SEL (0xF5) – Port 2 Function Select .................................................................................. 98
P0DIR (0xFD) – Port 0 Direction ........................................................................................... 98
P1DIR (0xFE) – Port 1 Direction............................................................................................ 98
P2DIR (0xFF) – Port 2 Direction............................................................................................ 99
P0INP (0x8F) – Port 0 Input Mode......................................................................................... 99
P1INP (0xF6) – Port 1 Input Mode......................................................................................... 99
P2INP (0xF7) – Port 2 Input Mode......................................................................................... 99
P0IFG (0x89) – Port 0 Interrupt Status Flag ......................................................................... 100
P1IFG (0x8A) – Port 1 Interrupt Status Flag ........................................................................ 100
P2IFG (0x8B) – Port 2 Interrupt Status Flag......................................................................... 100
PICTL (0x8C) – Port Interrupt Control................................................................................. 101
P1IEN (0x8D) – Port 1 Interrupt Mask................................................................................. 101
DMAARM (0xD6) – DMA Channel Arm............................................................................ 111
DMAREQ (0xD7) – DMA Channel Start Request and Status.............................................. 112
DMA0CFGH (0xD5) – DMA Channel 0 Configuration Address High Byte....................... 112
DMA0CFGL (0xD4) – DMA Channel 0 Configuration Address Low Byte........................ 112
DMA1CFGH (0xD3) – DMA Channel 1-4 Configuration Address High Byte.................... 112
DMA1CFGL (0xD2) – DMA Channel 1-4 Configuration Address Low Byte..................... 112
SWRS033E
Page 227 of 239
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
