CC1110Fx / CC1111Fx
95 µs when fRef is 24 MHz. The blanking
interval between each frequency hop is then
approximately equal to the PLL turn on time.
The VCO current calibration result is available
in FSCAL2 and is not dependent on the RF
frequency. Neither is the charge pump current
calibration result available in FSCAL3. The
same value can therefore be used for all
frequencies.
14.18.1 SRD/ISM Regulations
International regulations and national laws
regulate the use of radio receivers and
transmitters. Short Range Devices (SRDs) for
license free operation below 1 GHz are usually
operated in the 315 MHz, 433 MHz, 868 MHz
or 915 MHz frequency bands. The
CC1110Fx/CC1111Fx is specifically designed for
such use with its 300 - 348 MHz, 391 - 464
MHz, and 782 - 928 MHz operating ranges.
The most important regulations when using the
CC1110Fx/CC1111Fx in the 433 MHz, 868 MHz, or
915 MHz frequency bands are EN 300 220
(Europe) and FCC CFR47 part 15 (USA). A
summary of the most important aspects of
these regulations can be found in [10] or [11].
3) Run calibration on a single frequency at
startup. Next write 0 to FSCAL3[5:4] to
disable the charge pump calibration. After
writing to FSCAL3[5:4] strobe SRX (or STX)
with MCSM0.FS_AUTOCAL=1 for each new
frequency hop. That is, VCO current and VCO
capacitance calibration is done but not charge
pump current calibration. When charge pump
current calibration is disabled the calibration
time is reduced from approximately 720 µs to
approximately 150 µs when fRef is 26 MHz and
from 780 µs to 163 µs when fRef is 24 MHz.
The blanking interval between each frequency
hop is then approximately 240 µs us and 260
µs respectively.
Please note that compliance with regulations is
dependent on complete system performance.
It is the customer’s responsibility to ensure that
the system complies with regulations.
14.18.2 Frequency Hopping and Multi-Channel
Systems
The 433 MHz, 868 MHz, or 915 MHz are
shared by many systems both in industrial,
office and home environments. It is therefore
recommended to use frequency hopping
spread spectrum (FHSS) or a multi-channel
protocol because the frequency diversity
makes the system more robust with respect to
interference from other systems operating in
the same frequency band. FHSS also combats
multipath fading.
There is a trade off between blanking time and
memory space needed for storing calibration
data in non-volatile memory. Solution 2) above
gives the shortest blanking interval, but
requires more memory space to store
calibration
values.
Solution
3)
gives
approximately 570 µs smaller blanking interval
than solution 1 when fRef is 24 MHz and
approximately 615 µs smaller blanking interval
than solution 1 when fRef is 24 MHz ).
Charge pump current, VCO current and VCO
capacitance array calibration data is required
for each frequency when implementing
frequency hopping for CC1110Fx/CC1111Fx. There
are 3 ways of obtaining the calibration data
from the chip:
14.18.3 Wideband Modulation not Using
Spread Spectrum
Digital modulation systems under FCC part
15.247 includes 2-FSK and GFSK modulation.
A maximum peak output power of 1 W (+30
dBm) is allowed if the 6 dB bandwidth of the
modulated signal exceeds 500 kHz. In
addition, the peak power spectral density
conducted to the antenna shall not be greater
than +8 dBm in any 3 kHz band. Pleas refer to
DN006 [12] for further details conserning
wideband modulation and CC1110Fx/CC1111Fx.
1) Frequency hopping with calibration for each
hop. The PLL calibration time is approximately
720 µs and the blanking interval between each
frequency hop is then approximately 810 µs
when fRef is 26 MHz. When fRef is 24 MHz,
these numbers are 780 µs and 875 µs
respectively.
Operating with high frequency separation, the
CC1110Fx/CC1111Fx is suited for systems
targeting compliance with digital modulation
systems as defined by FCC part 15.247. An
external power amplifier is needed to increase
the output above +10 dBm.
2) Fast frequency hopping without calibration
for each hop can be done by calibrating each
frequency at startup and saving the resulting
FSCAL3, FSCAL2 and FSCAL1 register values
in memory. Between each frequency hop, the
calibration process can then be replaced by
writing the FSCAL3, FSCAL2 and FSCAL1
register values corresponding to the next RF
frequency. The PLL turn on time is
approximately 90 µs when fRef is 26 MHz and
14.18.4 Data Burst Transmissions
The
high
maximum
opens
data
up
rate
for
of
burst
CC1110Fx/CC1111Fx
SWRS033E
Page 207 of 239