SN54ACT16244, 74ACT16244
16-BIT BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS116B – MARCH 1990 – REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
2
×
VCC
From Output
Under Test
CL = 50 pF
(see Note A)
500
Ω
S1
Open
GND
500
Ω
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2
×
VCC
GND
LOAD CIRCUIT
Output
Control
(low-level
enabling)
3V
Output
Waveform 1
S1 at 2
×
VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
3V
1.5 V
tPZL
tPLZ
50% VCC
tPHZ
80% VCC
VOH
20% VCC
1.5 V
0V
Input
tPLH
1.5 V
1.5 V
0V
tPHL
VOH
50% VCC
50% VCC
VOL
[
VCC
VOL
tPZH
Output
50% VCC
[
0V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
1 MHz, ZO = 50
Ω,
tr = 3 ns, tf = 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
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•
DALLAS, TEXAS 75265
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
