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74ACT16244DGGRE4 参数 Datasheet PDF下载

74ACT16244DGGRE4图片预览
型号: 74ACT16244DGGRE4
PDF下载: 下载PDF文件 查看货源
内容描述: 输入是TTL电压兼容, 500 - mA典型闭锁抗扰度在125A ℃, [Inputs Are TTL-Voltage Compatible, 500-mA Typical Latch-Up Immunity at 125°C]
分类和应用: 逻辑集成电路光电二极管驱动
文件页数/大小: 14 页 / 536 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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SN54ACT16244, 74ACT16244  
16-BIT BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCAS116B – MARCH 1990 – REVISED APRIL 1996  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
CC  
Open  
GND  
TEST  
S1  
S1  
t
/t  
Open  
PLH PHL  
/t  
500 Ω  
From Output  
Under Test  
t
2 × V  
CC  
GND  
PLZ PZL  
t
/t  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
Output  
Control  
(low-level  
enabling)  
LOAD CIRCUIT  
3 V  
0 V  
1.5 V  
1.5 V  
t
PZL  
3 V  
0 V  
t
PLZ  
Output  
V
Input  
CC  
1.5 V  
1.5 V  
Waveform 1  
S1 at 2 × V  
50% V  
CC  
20% V  
CC  
CC  
CC  
V
V
OL  
t
(see Note B)  
PLH  
t
PHZ  
t
PHL  
t
PZH  
Output  
Waveform 2  
S1 at GND  
V
OH  
OH  
0 V  
80% V  
50% V  
50% V  
Output  
CC  
CC  
V
50% V  
CC  
OL  
(see Note B)  
VOLTAGE WAVEFORMS  
C includes probe and jig capacitance.  
L
VOLTAGE WAVEFORMS  
NOTES: A.  
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t = 3 ns, t = 3 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
6
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