欢迎访问ic37.com |
会员登录 免费注册
发布采购

W681308DG 参数 Datasheet PDF下载

W681308DG图片预览
型号: W681308DG
PDF下载: 下载PDF文件 查看货源
内容描述: W681308 USB音频控制器由新唐集成了高速8051微控制器单元(MCU ) [W681308 USB Audio Controller from Nuvoton integrates fast 8051 Microcontroller Unit (MCU)]
分类和应用: 微控制器
文件页数/大小: 64 页 / 981 K
品牌: NUVOTEM TALEMA [ NUVOTEM TALEMA ]
 浏览型号W681308DG的Datasheet PDF文件第6页浏览型号W681308DG的Datasheet PDF文件第7页浏览型号W681308DG的Datasheet PDF文件第8页浏览型号W681308DG的Datasheet PDF文件第9页浏览型号W681308DG的Datasheet PDF文件第11页浏览型号W681308DG的Datasheet PDF文件第12页浏览型号W681308DG的Datasheet PDF文件第13页浏览型号W681308DG的Datasheet PDF文件第14页  
W681308  
Driver  
Pin  
No  
State in  
Reset  
Pin Name  
Functionality  
JTAG Data Output / GPIO 2  
Pin Type  
Strength  
TDO/GPIO 2  
VPP  
23  
24  
Pull-L  
D
A
I/O  
2 mA  
Reset signal for digital core. Tie this pin to 6.75V for  
programming the OTP ROM  
P
AGND  
SPN  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
Analog ground supply voltage  
A
A
A
A
A
A
A
A
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D
P
O
Speaker1 negative connection  
Speaker2 negative connection  
Analog supply voltage  
EARN  
O
AVDD  
P
EARP  
Speaker2 positive connection  
O
SPP  
Speaker1 positive connection  
O
AGND  
Analog ground supply voltage  
P
RGND  
Low noise ADC and DAC reference  
The microphone amplifier output  
Microphone positive connection  
Voltage reference  
P
MCO  
G
MCP  
O
VREF2  
O
VREF1  
Voltage reference  
O
REGL  
Linear regulator base control output  
Keypad row Y4 connection /GPIO 24  
Keypad row Y3 connection /GPIO 23  
Keypad row Y2 connection /GPIO 22  
Keypad row Y1 connection /GPIO 21  
Keypad row Y0 connection /GPIO 20  
Keypad column X4 connection /GPIO 19  
Keypad column X3 connection /GPIO 18  
Keypad column X2 connection /GPIO 17  
Keypad column X1 connection /GPIO 16  
Keypad column X0 connection /GPIO 15  
O
KY4/GPIO 24  
KY3/GPIO 23  
KY2/GPIO 22  
KY1/GPIO 21  
KY0/GPIO 20  
KX4/GPIO 19  
KX3/GPIO 18  
KX2/GPIO 17  
KX1/GPIO 16  
KX0/GPIO 15  
Pull-H  
Pull-H  
Pull-H  
Pull-H  
Pull-H  
Pull-L  
Pull-L  
Pull-L  
Pull-L  
Pull-L  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
2 mA  
2 mA  
2 mA  
2 mA  
2 mA  
2 mA  
2 mA  
2 mA  
2 mA  
2 mA  
Tie to DGND for normal operation. Tie to DVDD to  
enable JTAG function.  
JTAG  
48  
Pull-L  
D
I
2 mA  
Table 1 Pin Description  
NOTE: All GPIO pins modes are controlled by register settings.  
10  
Rev1.2  
 
 复制成功!