■ PRECAUTIONS
1.Circuit Design
◆Verification of operating environment, electrical rating and performance
1.A malfunction in medical equipment, spacecraft, nuclear reactors, etc. may cause serious harm to human life or have severe social ramifications.
As such, any capacitors to be used in such equipment may require higher safety and/or reliability considerations and should be clearly differentiated from
components used in general purpose applications.
◆Operating Voltage（Verification of Rated voltage）
1.The operating voltage for capacitors must always be lower than their rated values.
Precautions
If an AC voltage is loaded on a DC voltage, the sum of the two peak voltages should be lower than the rated value of the capacitor chosen. For a circuit
where both an AC and a pulse voltage may be present, the sum of their peak voltages should also be lower than the capacitor's rated voltage.
2.Even if the applied voltage is lower than the rated value, the reliability of capacitors might be reduced if either a high frequency AC voltage or a pulse
voltage having rapid rise time is present in the circuit.
2. PCB Design
Precautions
◆Pattern configurations（Design of Land-patterns）
1.When capacitors are mounted on a PCB, the amount of solder used（size of fillet）can directly affect capacitor performance. Therefore, the following
items must be carefully considered in the design of solder land patterns:
（1）The amount of solder applied can affect the ability of chips to withstand mechanical stresses which may lead to breaking or cracking. Therefore, when
designing land-patterns it is necessary to consider the appropriate size and configuration of the solder pads which in turn determines the amount of
solder necessary to form the fillets.
（2）When more than one part is jointly soldered onto the same land or pad, the pad must be designed so that each component's soldering point is separated by solder-resist.
◆Pattern configuration（s Capacitor layout on panelized [breakaway] PC boards）
1.After capacitors have been mounted on the boards, chips can be subjected to mechanical stresses in subsequent manufacturing processes（PCB cutting,
board inspection, mounting of additional parts, assembly into the chassis, wave soldering the reflow soldered boards etc.） For this reason, planning
pattern configurations and the position of SMD capacitors should be carefully performed to minimize stress.
◆Pattern configurations（Design of Land-patterns）
1.The following diagrams and tables show some examples of recommended patterns to prevent excessive solder amourts（. larger fillets which extend above
the component end terminations）Examples of improper pattern designs are also shown.
（1）Recommended land dimensions for a typical chip capacitor land patterns for PCBs
Recommended land dimensions for reflow-soldering（unit: mm）
Type
107
1.6
0.8
212
2.0
316
3.2
1.6
325
3.2
2.5
L
Size
W
51.25
A
B
C
0.8～1.0 0.8～1.2 1.8～2.5 1.8～2.5
0.6～0.8 0.8～1.2 1.0～1.5 1.0～1.5
0.6～0.8 0.9～1.6 1.2～2.0 1.8～3.2
Excess solder can affect the ability of chips to withstand mechanical stresses. Therefore, please take proper precautions when designing land-patterns.
（2）Examples of good and bad solder application
Items
Not recommended
Recommended
Mixed mounting
of SMD and leaded
components
Component
placement close to the
chassis
Electrode pattern
Technical
considerations
Hand-soldering of
leaded components
near mounted
components
Horizontal component
placement
◆Pattern configuration（s Capacitor layout on panelized [breakaway] PC boards）
1-1. The following are examples of good and bad capacitor layout; SMD capacitors should be located to minimize any possible mechanical stresses from board warp or deflection.
Items
Not recommended
Recommended
Deflection of the board
1-2. To layout the capacitors for the breakaway PC board, it should be noted that the amount of mechanical stresses given will vary depending on capacitor
layout. The example below shows recommendations for better design.
1-3.When breaking PC boards along their perforations, the amount of mechanical stress on the capacitors can vary according to the method used. The
following methods are listed in order from least stressful to most stressful: push-back, slit, V-grooving, and perforation. Thus, any ideal SMD capacitor
layout must also consider the PCB splitting procedure.
＊This catalog contains the typical specification only due to the limitation of space. When you consider the purchase of our products, please check our specification.
For details of each product (characteristics graph, reliability information, precautions for use, and so on), see our Web site (http://www.ty-top.com/) or CD catalogs.
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mlcc09_prec-P1
TAIYO YUDEN [ TAIYO YUDEN (U.S.A.), INC ]
