SyncMOS Technologies Inc.
May 2001
SM89516
AC Characteristics
(16/25MHz, operating conditions; CL for Port 0, ALE and PSEN Outputs=100pF; CL for all Other Output=80pF)
Valid
fosc=16MHz
Variable fosc
Unit Remarks
Symbol
T LHLL
T AVLL
T LLAX
T LLIV
T LLPL
T PLPH
T PLIV
Parameter
ALE pulse width
Cycle
Min. Typ. Max
Min.
Typ. Max
RD/WRT 115
2xT - 10
T - 20
T - 10
nS
nS
nS
Address Valid to ALE low
Address Hold after ALE low
ALE low to Valid Instruction In
ALE low to #PSEN low
#PSEN pulse width
#PSEN low to Valid Instruction In
Instruction Hold after #PSEN
Instruction Float after #PSEN
Address to Valid Instruction In
#PSEN low to Address Float
#RD pulse width
RD/WRT
RD/WRT
RD
RD
RD
RD
RD
RD
RD
RD
RD
WRT
RD
RD
RD
RD
RD
43
53
240
177
4xT - 10 nS
53
173
T - 10
3xT - 15
nS
nS
3xT - 10 nS
nS
T PXIX
T PXIZ
T AVIV
0
0
87
292
10
T + 25 nS
5xT - 20 nS
10 nS
nS
T PLAZ
T RLRH
T WLWH
T RLDV
T RHDX
T RHDZ
T LLDV
T AVDV
T LLYL
T AVYL
T QVWH
T QVWX
T WHQX
T RLAZ
T YALH
T CHCL
T CLCX
T CLCH
T CHCX
T, TCLCL
365
365
6xT - 10
6xT - 10
#WR pulse width
#RD low to Valid Data In
Data Hold after #RD
nS
302
5xT - 10 nS
nS
0
0
Data Float after #RD
145
590
542
2xT + 20 nS
8xT - 10 nS
9xT - 20 nS
3xT + 10 nS
nS
ALE low to Valid Data In
Address to Valid Data In
ALE low to #WR High or #RD low
Address Valid to #WR or #RD low
Data Valid to #WR High
Data Valid to #WR transition
Data hold after #WR
#RD low to Address Float
#WR or #RD high to ALE high
clock fall time
RD/WRT
RD/WRT
WRT
WRT
WRT
RD
178
230
403
38
197 3xT - 10
4xT - 20
7xT - 35
T - 25
nS
nS
nS
nS
73
T + 10
5
RD/WRT
53
72
T -10
T + 10 nS
nS
nS
nS
nS
nS
clock low time
clock rise time
clock high time
clock period
63
1/fosc
ICC Idle mode test circuit
ICC Active mode test circuit
Vcc
Vcc
Vcc
ICC
ICC
VCC
VCC
RST
8
8
PO
EA
RST
PO
EA
SM89516
SM89516
XTAL2
XTAL1
VSS
(NC)
Clock Signal
XTAL2
XTAL1
VSS
(NC)
Clock Signal
Specifications subject to change without notice,contact your sales representatives for the most recent information.
10/19
Ver 1.3
PID 89516 05/01
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
